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  /external/llvm/test/CodeGen/AMDGPU/
si-triv-disjoint-mem-access.ll 5 declare void @llvm.AMDGPU.barrier.local() #2
64 call void @llvm.AMDGPU.barrier.local() #2
ds-sub-offset.ll 3 declare void @llvm.AMDGPU.barrier.local() #2
flat-address-space.ll 130 declare void @llvm.AMDGPU.barrier.local() #1
  /external/opencv3/modules/imgproc/src/opencl/
filterSepRow.cl 258 barrier(CLK_LOCAL_MEM_FENCE);
363 barrier(CLK_LOCAL_MEM_FENCE);
corner.cl 174 barrier(CLK_LOCAL_MEM_FENCE);
  /prebuilts/go/darwin-x86/src/cmd/compile/internal/gc/
syntax.go 174 Nowritebarrier bool // emit compiler error instead of write barrier
214 OASWB // Left = Right (with write barrier)
  /prebuilts/go/darwin-x86/src/runtime/
sys_linux_arm.s 424 // memory barrier instruction at all. ARMv6 added SMP support and has
425 // a memory barrier, but it requires writing to a coprocessor
  /prebuilts/go/linux-x86/src/cmd/compile/internal/gc/
syntax.go 174 Nowritebarrier bool // emit compiler error instead of write barrier
214 OASWB // Left = Right (with write barrier)
  /prebuilts/go/linux-x86/src/runtime/
sys_linux_arm.s 424 // memory barrier instruction at all. ARMv6 added SMP support and has
425 // a memory barrier, but it requires writing to a coprocessor
  /art/runtime/lambda/
closure.h 48 // Any object references are fixed up during the copy (if there was a read barrier).
  /art/runtime/
profiler.cc 142 // And finally tell the barrier that we're done.
240 // Wait for the barrier to be crossed by all runnable threads. This wait
245 // Wait for all threads to pass the barrier.
398 profiler_barrier_(new Barrier(0)) {
  /dalvik/libdex/
DexOpcodes.cpp 274 "+return-void-barrier",
  /device/google/contexthub/firmware/src/platform/stm32f4xx/
rtc.c 17 #include <cpu/inc/barrier.h>
  /external/blktrace/
README 52 BARRIER
  /external/clang/include/clang/Basic/
OpenMPKinds.def 115 OPENMP_DIRECTIVE(barrier)
  /external/clang/lib/Headers/
arm_acle.h 37 /* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
  /external/clang/test/CodeGenObjC/
blocks.m 93 // doesn't require a read barrier.
  /external/libchrome/base/files/
file_path_watcher_fsevents.cc 160 // PostTask forms a sufficient memory barrier to ensure that the value is
  /external/libselinux/src/
sestatus.c 56 * __sync_synchronize is a portable memory barrier for various kind
  /external/llvm/include/llvm/CodeGen/
GCStrategy.h 46 // The read and write barrier support can be used with either implementation.
ScheduleDAG.h 65 Barrier, ///< An unknown scheduling barrier.
188 /// as a barrier.
190 return getKind() == Order && Contents.OrdKind == Barrier;
  /external/llvm/lib/Target/XCore/
XCoreISelLowering.h 85 // Memory barrier.
  /external/mesa3d/src/gallium/drivers/llvmpipe/
lp_rast_priv.h 129 pipe_barrier barrier; member in struct:lp_rasterizer
  /external/protobuf/src/google/protobuf/stubs/
atomicops_internals_arm64_gcc.h 48 // the call is reordered between the operation and the memory barrier. This does
  /external/selinux/libselinux/src/
sestatus.c 56 * __sync_synchronize is a portable memory barrier for various kind

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