| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| set-arch.s | 40 bc1f text_label
41 bc1f $fcc1,text_label
|
| micromips@relax-at.d | 87 ([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*>
177 ([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*>
280 ([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*>
370 ([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*>
|
| micromips@relax.d | 87 ([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*>
177 ([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*>
280 ([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*>
370 ([0-9a-f]+) <[^>]*> 4380 fffe bc1f \1 <.*>
|
| r6-removed.s | 11 bc1f 1f
|
| relax-at.d | 80 000000c8 <foo\+0xc8> bc1f 000000dc <foo\+0xdc>
273 00020318 <bar\+0xc8> bc1f 0002032c <bar\+0xdc>
|
| relax.d | 79 000000c8 <foo\+0xc8> bc1f 000000dc <foo\+0xdc>
272 00020318 <bar\+0xc8> bc1f 0002032c <bar\+0xdc>
|
| set-arch.d | 28 00000050 <[^>]*> 4500ffff bc1f 00000050 <[^>]*>
29 00000054 <[^>]*> 4504fffe bc1f \$fcc1,00000050 <[^>]*>
|
| /art/compiler/utils/mips/ |
| assembler_mips.h | 215 void Bc1f(uint16_t imm16); // R2
216 void Bc1f(int cc, uint16_t imm16); // R2
380 void Bc1f(MipsLabel* label); // R2
381 void Bc1f(int cc, MipsLabel* label); // R2
[all...] |
| assembler_mips_test.cc | [all...] |
| assembler_mips.cc | 562 void MipsAssembler::Bc1f(uint16_t imm16) {
563 Bc1f(0, imm16);
566 void MipsAssembler::Bc1f(int cc, uint16_t imm16) {
760 Bc1f(static_cast<int>(rs), imm16);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrFPU.td | 512 def BC1F : MMRel, BC1F_FT<"bc1f", brtarget, II_BC1F, MIPS_BRANCH_F>,
561 def : MipsInstAlias<"bc1f $offset", (BC1F FCC0, brtarget:$offset)>,
|
| MipsSEInstrInfo.cpp | 419 case Mips::BC1T: return Mips::BC1F;
420 case Mips::BC1F: return Mips::BC1T;
495 Opc == Mips::BC1T || Opc == Mips::BC1F || Opc == Mips::B ||
|
| /external/llvm/test/MC/Mips/ |
| micromips-fpu-instructions.s | 24 # CHECK-EL: bc1f 1332 # encoding: [0x80,0x43,0x9a,0x02]
89 # CHECK-EB: bc1f 1332 # encoding: [0x43,0x80,0x02,0x9a]
152 bc1f 1332
|
| mips-fpu-instructions.s | 141 # CHECK: bc1f $BB_1 # encoding: [A,A,0x00,0x45]
178 bc1f $fcc0, $BB_1
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32r2.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/webrtc/webrtc/modules/audio_processing/aec/ |
| aec_core_mips.c | 167 "bc1f 4f \n\t"
170 "bc1f 3f \n\t"
229 "bc1f 5f \n\t"
[all...] |
| /art/disassembler/ |
| disassembler_mips.cc | 223 { kITypeMask | (0x3e3 << 16), (17 << kOpcodeShift) | (8 << 21), "bc1f", "cB" },
456 case 'c': // Floating-point condition code flag in bc1f/bc1t and movf/movt.
|
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| valid-mips32-el.txt | 15 0x4c 0x01 0x00 0x45 # CHECK: bc1f 1332
16 0x4c 0x01 0x1c 0x45 # CHECK: bc1f $fcc7, 1332
|
| valid-mips32.txt | 167 0x45 0x00 0x00 0x01 # CHECK: bc1f 8
168 0x45 0x00 0x01 0x4c # CHECK: bc1f 1332
173 0x45 0x1c 0x01 0x4c # CHECK: bc1f $fcc7, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| valid-mips32r2-el.txt | 16 0x4c 0x01 0x00 0x45 # CHECK: bc1f 1332
17 0x4c 0x01 0x1c 0x45 # CHECK: bc1f $fcc7, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| valid-mips32r3-el.txt | 13 0x4c 0x01 0x00 0x45 # CHECK: bc1f 1332
14 0x4c 0x01 0x1c 0x45 # CHECK: bc1f $fcc7, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| valid-mips32r5-el.txt | 13 0x4c 0x01 0x00 0x45 # CHECK: bc1f 1332
14 0x4c 0x01 0x1c 0x45 # CHECK: bc1f $fcc7, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| valid-mips4-el.txt | 16 0x01 0x00 0x00 0x45 # CHECK: bc1f 8
17 0x00 0x00 0x04 0x45 # CHECK: bc1f $fcc1, 4
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| valid-mips64r3-el.txt | 14 0x4c 0x01 0x00 0x45 # CHECK: bc1f 1332
15 0x4c 0x01 0x1c 0x45 # CHECK: bc1f $fcc7, 1332
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| valid-mips64r5-el.txt | 14 0x4c 0x01 0x00 0x45 # CHECK: bc1f 1332
15 0x4c 0x01 0x1c 0x45 # CHECK: bc1f $fcc7, 1332
|
