| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| branch-misc-3.d | 17 .* bc1t .*
26 .* bc1t .*
32 .* bc1t .*
38 .* bc1t .*
43 .* bc1t .*
49 .* bc1t .*
54 .* bc1t .*
57 .* bc1t .*
|
| branch-misc-3.s | 6 bc1t 1f
12 bc1t 1f
18 bc1t 1f
23 bc1t 1f
27 bc1t 1f
35 bc1t 1f
40 bc1t 1f
43 bc1t 1f
|
| relax.s | 18 bc1t bar
46 bc1t foo
|
| micromips@mips32-cp2.s | 31 # Cop2 branches with cond code number, like bc1t/f.
|
| micromips@mips4-branch-likely.d | 14 [0-9a-f]+ <[^>]*> 43a8 fffe bc1t \$fcc2,0+0006 <text_label\+0x6>
|
| mips32-cp2.s | 34 # Cop2 branches with cond code number, like bc1t/f
|
| /external/llvm/test/MC/Mips/ |
| micromips-bad-branches.s | 112 # CHECK: bc1t -65535
114 # CHECK: bc1t -65537
116 # CHECK: bc1t 65535
118 # CHECK: bc1t 65536
121 # CHECK: bc1t $fcc0, -65535
123 # CHECK: bc1t $fcc0, -65537
125 # CHECK: bc1t $fcc0, 65535
127 # CHECK: bc1t $fcc0, 65536
218 bc1t -65535
219 bc1t -6553
[all...] |
| mips-bad-branches.s | 208 # CHECK: bc1t -131069
210 # CHECK: bc1t -131070
212 # CHECK: bc1t -131071
214 # CHECK: bc1t -131073
216 # CHECK: bc1t 131069
218 # CHECK: bc1t 131070
220 # CHECK: bc1t 131071
222 # CHECK: bc1t 131072
225 # CHECK: bc1t $fcc0, -131069
227 # CHECK: bc1t $fcc0, -13107
[all...] |
| /art/runtime/interpreter/mterp/mips/ |
| op_double_to_long.S | 31 bc1t .L${opcode}_set_vreg
38 bc1t .L${opcode}_set_vreg
44 bc1t .L${opcode}_set_vreg
|
| op_float_to_int.S | 27 bc1t .L${opcode}_set_vreg_f
32 bc1t .L${opcode}_set_vreg_f
37 bc1t .L${opcode}_set_vreg_f
|
| op_float_to_long.S | 28 bc1t .L${opcode}_set_vreg
34 bc1t .L${opcode}_set_vreg
40 bc1t .L${opcode}_set_vreg
|
| op_cmpl_double.S | 36 bc1t fcc0, .L${opcode}_finish
39 bc1t fcc0, .L${opcode}_finish
42 bc1t fcc0, .L${opcode}_finish
|
| op_cmpl_float.S | 43 bc1t fcc0, .L${opcode}_finish
46 bc1t fcc0, .L${opcode}_finish
49 bc1t fcc0, .L${opcode}_finish
|
| op_double_to_int.S | 34 bc1t .L${opcode}_set_vreg_f
40 bc1t .L${opcode}_set_vreg_f
45 bc1t .L${opcode}_set_vreg_f
|
| /external/llvm/test/MC/Disassembler/Mips/mips1/ |
| invalid-xfail.txt | 9 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips2/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips3/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
