| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| invalid-xfail.txt | 11 0x45 0x09 0x01 0x01 # bc1t $fcc2, 1028 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
|
| /external/llvm/test/MC/Mips/ |
| mips-jump-delay-slots.s | 13 # CHECK: bc1t 1332
15 bc1t 1332
|
| mips-jump-instructions.s | 15 # CHECK32: bc1t 1332 # encoding: [0x4d,0x01,0x01,0x45]
40 # CHECK64: bc1t 1332 # encoding: [0x4d,0x01,0x01,0x45]
67 bc1t 1332
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| relax-swap1.s | 71 bc1t foo
73 bc1t bar
|
| mips4-fp.s | 6 bc1t $fcc1,text_label
|
| mips4-fp.d | 13 [0-9a-f]+ <[^>]*> bc1t \$fcc1,0+0000 <text_label>
|
| /external/valgrind/none/tests/mips32/ |
| fpu_branches.stdout.exp | 50 --- BC1T --- if fs == ft then out = fs else out = fs + ft
51 bc1t, c.eq.s out=-4578.500000, fs=0.000000, ft=-4578.500000
52 bc1t, c.eq.d out=-45786.500000, fs=0.000000, ft=-45786.500000
53 bc1t, c.eq.s out=456.250000, fs=456.250000, ft=456.250000
54 bc1t, c.eq.d out=456.250000, fs=456.250000, ft=456.250000
55 bc1t, c.eq.s out=37.031250, fs=3.000000, ft=34.031250
56 bc1t, c.eq.d out=37.031250, fs=3.000000, ft=34.031250
57 bc1t, c.eq.s out=4577.750000, fs=-1.000000, ft=4578.750000
58 bc1t, c.eq.d out=45785.750000, fs=-1.000000, ft=45786.750000
59 bc1t, c.eq.s out=1559.500000, fs=1384.500000, ft=175.00000
[all...] |
| fpu_branches.c | 183 printf("--- BC1T --- if fs == ft then " \
186 TESTINST1s("bc1t", i);
187 TESTINST1d("bc1t", i);
|
| /external/valgrind/none/tests/mips64/ |
| fpu_branches.stdout.exp | 50 --- BC1T --- if fs != ft then out = fs + ft else out = ft
51 bc1t, c.eq.s out=-4578.500000, fs=0.000000, ft=-4578.500000
52 bc1t, c.eq.d out=-45786.500000, fs=0.000000, ft=-45786.500000
53 bc1t, c.eq.s out=456.250000, fs=456.250000, ft=456.250000
54 bc1t, c.eq.d out=456.250000, fs=456.250000, ft=456.250000
55 bc1t, c.eq.s out=37.031250, fs=3.000000, ft=34.031250
56 bc1t, c.eq.d out=37.031250, fs=3.000000, ft=34.031250
57 bc1t, c.eq.s out=4577.750000, fs=-1.000000, ft=4578.750000
58 bc1t, c.eq.d out=45785.750000, fs=-1.000000, ft=45786.750000
59 bc1t, c.eq.s out=1559.500000, fs=1384.500000, ft=175.00000
[all...] |
| fpu_branches.c | 16 printf("--- BC1T --- if fs != ft then " \
19 TESTINST1s("bc1t", i);
20 TESTINST1d("bc1t", i);
|
| /external/llvm/test/MC/Mips/mips1/ |
| valid.s | 21 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
22 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 314 case Mips::BC1T:
315 // bc1t $fcc0, $L1 => bc1t $L1
316 return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1t", MI, 1, OS);
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 23 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
24 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 25 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
26 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
27 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/CodeGen/Mips/ |
| fpbr.ll | 77 ; FCC: bc1t $BB2_2
165 ; FCC: bc1t $BB5_2
|
| /external/llvm/lib/Target/Mips/ |
| MicroMipsInstrFPU.td | 42 def BC1T_MM : MMRel, BC1F_FT<"bc1t", brtarget_mm, II_BC1T, MIPS_BRANCH_T>,
|
