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  /art/runtime/interpreter/mterp/mips64/
op_rem_int.S 1 %include "mips64/binop.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
op_shl_int.S 1 %include "mips64/binop.S" {"instr":"sll a0, a0, a1"}
op_shr_int.S 1 %include "mips64/binop.S" {"instr":"sra a0, a0, a1"}
op_sub_int.S 1 %include "mips64/binop.S" {"instr":"subu a0, a0, a1"}
op_ushr_int.S 1 %include "mips64/binop.S" {"instr":"srl a0, a0, a1"}
op_xor_int.S 1 %include "mips64/binop.S" {"instr":"xor a0, a0, a1"}
  /art/runtime/interpreter/mterp/x86/
op_add_int.S 1 %include "x86/binop.S" {"instr":"addl (rFP,%ecx,4), %eax"}
op_and_int.S 1 %include "x86/binop.S" {"instr":"andl (rFP,%ecx,4), %eax"}
op_or_int.S 1 %include "x86/binop.S" {"instr":"orl (rFP,%ecx,4), %eax"}
op_sub_int.S 1 %include "x86/binop.S" {"instr":"subl (rFP,%ecx,4), %eax"}
op_xor_int.S 1 %include "x86/binop.S" {"instr":"xorl (rFP,%ecx,4), %eax"}
  /art/runtime/interpreter/mterp/x86_64/
op_add_int.S 1 %include "x86_64/binop.S" {"instr":"addl (rFP,%rcx,4), %eax"}
op_and_int.S 1 %include "x86_64/binop.S" {"instr":"andl (rFP,%rcx,4), %eax"}
op_mul_int.S 1 %include "x86_64/binop.S" {"instr":"imull (rFP,%rcx,4), %eax"}
op_or_int.S 1 %include "x86_64/binop.S" {"instr":"orl (rFP,%rcx,4), %eax"}
op_sub_int.S 1 %include "x86_64/binop.S" {"instr":"subl (rFP,%rcx,4), %eax"}
op_xor_int.S 1 %include "x86_64/binop.S" {"instr":"xorl (rFP,%rcx,4), %eax"}
  /art/runtime/interpreter/mterp/mips/
op_div_int.S 2 %include "mips/binop.S" {"instr":"div a0, a0, a1", "chkzero":"1"}
4 %include "mips/binop.S" {"preinstr":"div zero, a0, a1", "instr":"mflo a0", "chkzero":"1"}
op_rem_int.S 2 %include "mips/binop.S" {"instr":"mod a0, a0, a1", "chkzero":"1"}
4 %include "mips/binop.S" {"preinstr":"div zero, a0, a1", "instr":"mfhi a0", "chkzero":"1"}
  /art/runtime/interpreter/mterp/arm/
op_shl_int.S 1 %include "arm/binop.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, asl r1"}
op_shr_int.S 1 %include "arm/binop.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, asr r1"}
op_ushr_int.S 1 %include "arm/binop.S" {"preinstr":"and r1, r1, #31", "instr":"mov r0, r0, lsr r1"}
  /art/runtime/interpreter/mterp/arm64/
op_shl_int.S 1 %include "arm64/binop.S" {"preinstr":"and w1, w1, #31", "instr":"lsl w0, w0, w1"}
op_shr_int.S 1 %include "arm64/binop.S" {"preinstr":"and w1, w1, #31", "instr":"asr w0, w0, w1"}
op_ushr_int.S 1 %include "arm64/binop.S" {"preinstr":"and w1, w1, #31", "instr":"lsr w0, w0, w1"}

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