| /external/llvm/test/CodeGen/NVPTX/ |
| noduplicate-syncthreads.ll | 26 %conv2 = fptrunc double %add to float
27 store float %conv2, float* %2, align 4
|
| /external/llvm/test/CodeGen/PowerPC/ |
| addi-licm.ll | 41 %conv2.i = fpext float %v15 to double
42 %mul.i = fmul double %conv.i, %conv2.i
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| structsinregs.ll | 80 %conv2 = sext i16 %1 to i32
81 %add = add nsw i32 %conv, %conv2
167 %conv2 = sext i16 %1 to i32
168 %add = add nsw i32 %conv, %conv2
|
| structsinmem.ll | 96 %conv2 = sext i16 %1 to i32
97 %add = add nsw i32 %conv, %conv2
188 %conv2 = sext i16 %1 to i32
189 %add = add nsw i32 %conv, %conv2
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| /external/llvm/test/Instrumentation/AddressSanitizer/X86/ |
| asm_more_registers_than_available.ll | 43 %conv2 = trunc i32 %conv to i8
44 store i8 %conv2, i8* %flagSA, align 1
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| speculate-vector-ops.ll | 8 %conv2 = insertelement <4 x i32> %conv, i32 %d, i32 1
9 %conv3 = insertelement <4 x i32> %conv2, i32 %d, i32 2
|
| /external/llvm/test/CodeGen/Mips/ |
| l3mc.ll | 52 %conv2 = fptosi float %2 to i64
53 store i64 %conv2, i64* @ll2, align 8
82 %conv2 = sitofp i64 %2 to float
83 store float %conv2, float* @f1, align 4
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| mips64signextendsesf.ll | 135 %conv2 = fptrunc double %call to float
136 ret float %conv2
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| /external/llvm/test/Transforms/Inline/ |
| inline-fp.ll | 112 %conv2 = sitofp i32 %response to float
113 %sub3 = fsub float %conv2, %mul
125 %conv2 = sitofp i32 %response to float
126 %sub3 = fsub float %conv2, %mul
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-fast-isel-conversion.ll | 34 %conv2 = trunc i32 %tmp1 to i16
35 store i16 %conv2, i16* %b.addr, align 2
73 %conv2 = zext i16 %tmp1 to i32
74 store i32 %conv2, i32* %c.addr, align 4
128 %conv2 = sext i16 %tmp1 to i32
129 store i32 %conv2, i32* %c.addr, align 4
|
| arm64-2012-06-06-FPToUI.ll | 42 %conv2 = fpext float %2 to double
45 %call4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str3, i32 0, i32 0), double %conv2, i32 %conv3)
|
| arm64-convert-v4f64.ll | 20 ; CHECK-DAG: fcvtzs v[[CONV2:[0-9]+]].2d, v2.2d
22 ; CHECK-DAG: xtn v[[NA2:[0-9]+]].2s, v[[CONV2]].2d
|
| /external/llvm/test/CodeGen/X86/ |
| cmovcmov.ll | 200 %conv2 = sitofp i32 %conv1 to float
201 ret float %conv2
222 %conv2 = sitofp i32 %conv1 to float
223 ret float %conv2
|
| 2009-07-06-TwoAddrAssert.ll | 128 %conv2.i = or i16 %rem1.i, -16384 ; <i16> [#uses=1]
129 %0 = call i16 asm "xchgb ${0:h}, ${0:b}", "=Q,0,~{dirflag},~{fpsr},~{flags}"(i16 %conv2.i) nounwind ; <i16> [#uses=1]
|
| i386-shrink-wrapping.ll | 104 %conv2 = select i1 %.b3, i32 0, i32 6
105 %call = tail call i32 (i8*, ...) @varfunc(i8* nonnull getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %conv2) #1
|
| machine-cse.ll | 119 %conv2 = and i32 %c, 255
125 %cmp3 = icmp eq i32 %a, %conv2
|
| store-narrow.ll | 166 %conv2 = trunc i32 %shr3 to i8
167 ret i8 %conv2
|
| /external/llvm/test/CodeGen/ARM/ |
| rev.ll | 50 %conv2 = zext i16 %shr9 to i32
52 %or = or i32 %conv2, %shl
|
| /external/llvm/test/CodeGen/BPF/ |
| intrinsics.ll | 72 %conv2 = trunc i64 %c to i16
73 %2 = tail call i16 @llvm.bswap.i16(i16 %conv2)
|
| /external/llvm/test/CodeGen/SPARC/ |
| varargs.ll | 42 %conv2 = sitofp i32 %1 to double
55 %.pn = phi double [ %2, %sw.bb3 ], [ %conv2, %sw.bb ]
|
| /external/llvm/test/Transforms/InstCombine/ |
| crash.ll | 22 %conv2.i86 = bitcast <2 x i64> %conv3.i98 to <4 x i32> ; <<4 x i32>> [#uses=1]
23 %cmp.i87 = icmp sgt <4 x i32> undef, %conv2.i86 ; <<4 x i1>> [#uses=1]
28 %conv2.i43 = bitcast <2 x i64> %or.i to <4 x i32> ; <<4 x i32>> [#uses=1]
29 %sub.i = sub <4 x i32> zeroinitializer, %conv2.i43 ; <<4 x i32>> [#uses=1]
|
| /external/llvm/test/Transforms/LoopVectorize/AArch64/ |
| loop-vectorization-factors.ll | 145 %conv2 = add nuw nsw i32 %add, 32
148 %and = and i32 %conv2, %conv13
191 %conv2 = add nsw i32 %add, 32
195 %and = and i32 %conv2, %conv13
|
| /external/llvm/test/CodeGen/Hexagon/ |
| expand-condsets-rm-segment.ll | 53 %conv2 = zext i32 %weight to i64
54 %mul = mul i64 %conv2, %conv
|
| /external/llvm/test/DebugInfo/X86/ |
| ghost-sdnode-dbgvalues.ll | 39 %conv2 = trunc i32 %add to i16, !dbg !22
40 %conv3 = sext i16 %conv2 to i32, !dbg !22
|
| /external/llvm/test/Transforms/SampleProfile/ |
| cov-zero-samples.ll | 65 %conv2 = sext i32 %7 to i64, !dbg !58
66 %mul = mul nsw i64 %conv2, %div, !dbg !58
|
