| /prebuilts/go/darwin-x86/src/runtime/ |
| signal_nacl_arm.go | 32 func (c *sigctxt) cpsr() uint32 { return c.regs().cpsr } func
|
| softfloat_arm.go | 63 // conditions array record the required CPSR cond field for the
80 var i, opc, regd, regm, regn, cpsr uint32
88 print("stepflt ", pc, " ", hex(i), " (cpsr ", hex(regs[_CPSR]>>28), ")\n")
96 cpsr = regs[_CPSR] >> 28
99 if cpsr&(conditions[opc/2]>>4) == conditions[opc/2]>>4 &&
100 cpsr&(conditions[opc/2]&0xf) == 0 {
111 if cpsr&(_FLAGS_N>>28) == cpsr&(_FLAGS_V>>28) {
122 if cpsr&(_FLAGS_N>>28) == cpsr&(_FLAGS_V>>28) &
[all...] |
| signal_freebsd_arm.go | 31 func (c *sigctxt) cpsr() uint32 { return c.regs().__gregs[16] } func
|
| signal_netbsd_arm.go | 31 func (c *sigctxt) cpsr() uint32 { return c.regs().__gregs[_REG_CPSR] } func
|
| signal_openbsd_arm.go | 34 func (c *sigctxt) cpsr() uint32 { return c.regs().sc_spsr } func
|
| /prebuilts/go/linux-x86/src/runtime/ |
| signal_darwin_arm.go | 31 func (c *sigctxt) cpsr() uint32 { return c.regs().cpsr } func
|
| signal_linux_arm.go | 31 func (c *sigctxt) cpsr() uint32 { return c.regs().cpsr } func
|
| signal_nacl_arm.go | 32 func (c *sigctxt) cpsr() uint32 { return c.regs().cpsr } func
|
| softfloat_arm.go | 63 // conditions array record the required CPSR cond field for the
80 var i, opc, regd, regm, regn, cpsr uint32
88 print("stepflt ", pc, " ", hex(i), " (cpsr ", hex(regs[_CPSR]>>28), ")\n")
96 cpsr = regs[_CPSR] >> 28
99 if cpsr&(conditions[opc/2]>>4) == conditions[opc/2]>>4 &&
100 cpsr&(conditions[opc/2]&0xf) == 0 {
111 if cpsr&(_FLAGS_N>>28) == cpsr&(_FLAGS_V>>28) {
122 if cpsr&(_FLAGS_N>>28) == cpsr&(_FLAGS_V>>28) &
[all...] |
| /device/google/contexthub/firmware/inc/cpu/cortexm4f/ |
| pendsv.h | 27 uint32_t r12, lr, pc, cpsr; member in struct:PendsvRegsLow
|
| /external/libunwind/src/arm/ |
| gen-offsets.c | 50 SC ("CPSR", arm_cpsr);
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| mrs-msr-thumb-v7-m-bad.l | 2 [^:]*:5: Error: selected processor does not support requested special purpose register -- `mrs r4,cpsr'
|
| /external/llvm/test/CodeGen/ARM/ |
| special-reg-acore.ll | 4 ; MCORE: LLVM ERROR: Invalid register name "cpsr".
64 !1 = !{!"cpsr"}
|
| avoid-cpsr-rmw.ll | 3 ; Avoid some 's' 16-bit instruction which partially update CPSR (and add false
4 ; dependency) when it isn't dependent on last CPSR defining instruction.
21 ; Avoid partial CPSR dependency via loop backedge.
54 ; Allow partial CPSR dependency when code size is the priority.
|
| cse-call.ll | 5 ; Don't CSE a cmp across a call that clobbers CPSR.
|
| /external/llvm/test/CodeGen/MIR/ARM/ |
| cfi-same-value.mir | 41 CMPrr %r4, %r5, 14, _, implicit-def %cpsr
42 Bcc %bb.2, 3, %cpsr
|
| /external/compiler-rt/test/builtins/Unit/arm/ |
| call_apsr.h | 22 union cpsr { union
|
| /external/kernel-headers/original/uapi/asm-arm64/asm/ |
| ptrace.h | 39 /* AArch32 CPSR bits */
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-2011-03-09-CPSRSpill.ll | 3 ; Can't copy or spill / restore CPSR.
|
| /hardware/broadcom/wlan/bcmdhd/dhdutil/include/ |
| hndrte_armtrap.h | 60 uint32 cpsr; member in struct:_trap_struct
|
| /external/valgrind/coregrind/m_gdbserver/ |
| valgrind-low-arm.c | 58 { "", 512, 0 }, // some floating point registers here. So, cpsr
65 { "cpsr", 512, 32 },
225 UInt cpsr = LibVEX_GuestARM_get_cpsr (arm); local
227 VG_(transfer) (&cpsr, buf, dir, size, mod);
232 *mod = newcpsr != cpsr;
|
| /device/google/contexthub/firmware/inc/platform/stm32f4xx/cmsis/ |
| core_cmFunc.h | 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
314 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
325 This function disables IRQ interrupts by setting the I-bit in the CPSR.
491 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
502 This function disables FIQ interrupts by setting the F-bit in the CPSR.
|
| /external/elfutils/backends/ |
| arm_corenote.c | 46 { .offset = 16 * 4, .regno = 128, .count = 1, .bits = 32 }, /* cpsr */
|
| /external/valgrind/none/tests/arm/ |
| v6intARM.c | 12 unsigned int cpsr; \
25 "mrs %1,cpsr;" \
26 : "=&r" (out), "=&r" (cpsr) \
30 printf("%s :: rd 0x%08x rm 0x%08x, carryin %d, cpsr 0x%08x %c%c%c%c\n", \
33 cpsr & 0xffff0000, \
34 ((1<<31) & cpsr) ? 'N' : ' ', \
35 ((1<<30) & cpsr) ? 'Z' : ' ', \
36 ((1<<29) & cpsr) ? 'C' : ' ', \
37 ((1<<28) & cpsr) ? 'V' : ' ' \
44 unsigned int cpsr; \
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm/ |
| list5.go | 66 return "CPSR"
|
