| /external/v8/src/mips64/ |
| assembler-mips64.cc | 1723 void Assembler::ddivu(Register rs, Register rt) { function in class:v8::internal::Assembler
1728 void Assembler::ddivu(Register rd, Register rs, Register rt) { function in class:v8::internal::Assembler
[all...] |
| simulator-mips64.cc | [all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| micromips-opc.c | 584 /* For ddivu, see the comments about div. */
585 {"ddivu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, 0 }
[all...] |
| mips-opc.c | [all...] |
| ChangeLog-9297 | [all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips64InstrInfo.td | 233 def DUDIV : Div<"ddivu", II_DDIVU, GPR64Opnd, [HI0_64, LO0_64]>,
|
| MipsInstrInfo.td | [all...] |
| MipsISelLowering.cpp | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips16-64.d | 621 7da: ea7f ddivu zero,v0,v1
|
| mips16.d | 620 7da: ea7f ddivu zero,v0,v1
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-mips.c | [all...] |
| /external/v8/src/compiler/mips64/ |
| code-generator-mips64.cc | 702 __ Ddivu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 243 void Mips64Assembler::Ddivu(GpuRegister rd, GpuRegister rs, GpuRegister rt) {
[all...] |
| /external/valgrind/VEX/priv/ |
| host_mips_defs.c | [all...] |
| guest_mips_toIR.c | [all...] |
| /prebuilts/android-emulator/linux-x86_64/ |
| emulator-mips | |
| /prebuilts/android-emulator/linux-x86_64/qemu/linux-x86/ |
| qemu-system-mips64el | |
