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  /external/llvm/test/CodeGen/SystemZ/
fp-mul-05.ll 17 %diff = fmul fp128 %f1, %f2x
  /external/llvm/test/CodeGen/Thumb2/
2009-07-23-CPIslandBug.ll 14 %1 = fmul float %mod.0.ph.ph, 5.000000e+00 ; <float> [#uses=0]
cortex-fp.ll 14 %0 = fmul float %a, %b
21 %0 = fmul double %a, %b
  /external/llvm/test/CodeGen/X86/
WidenArith.ll 14 %b1 = fmul <8 x float> %b, %a
peep-test-0.ll 14 %2 = fmul double %1, 3.000000e+00
peep-test-1.ll 14 %3 = fmul double %2, 2.930000e+00
fp_constant_op.ll 13 %tmp.1 = fmul double %P, 1.230000e+02 ; <double> [#uses=1]
17 ; CHECK: fmul dword ptr
fp_load_fold.ll 2 ; RUN: grep -i ST | not grep "fadd\|fsub\|fdiv\|fmul"
14 %R = fmul double %X, %Y ; <double> [#uses=1]
phys_subreg_coalesce.ll 14 %5 = fmul double %4, 5.000000e-01 ; <double> [#uses=1]
22 %13 = fmul double %12, 5.000000e-01 ; <double> [#uses=1]
  /external/llvm/test/CodeGen/XCore/
2009-01-14-Remat-Crash.ll 16 %tmp.0 = fmul double %tmp142, 0.000000e+00 ; <double> [#uses=1]
  /external/llvm/test/MC/X86/
intel-syntax-2.s 22 fmul label
  /external/llvm/test/Transforms/InstCombine/
no_cgscc_assert.ll 8 %mul = fmul fast float %f, %f
pow-exp2.ll 11 ; CHECK: %mul = fmul fast double %x, %y
  /external/llvm/test/Transforms/Mem2Reg/
PromoteMemToRegister.ll 15 %t6 = fmul double %t4, %t5 ; <double> [#uses=1]
  /external/llvm/test/Transforms/Reassociate/
crash2.ll 23 %3 = fmul fast float %2, 2.000000e+00
  /external/llvm/test/Transforms/SLPVectorizer/X86/
crash_flop7.ll 31 %mul269 = fmul double undef, undef
32 %mul270 = fmul double %mul269, %mul269
34 %mul283 = fmul double %mul269, %add282
36 %mul294 = fmul double %mul270, %add293
in-tree-user.ll 24 %mul1 = fmul double %conv, %1
25 %mul2 = fmul double %mul1, 7.000000e+00
31 %mul8 = fmul double %conv, %3
32 %mul9 = fmul double %mul8, 4.000000e+00
odd_store.ll 14 ;CHECK-NOT: fmul <3 x float>
23 %3 = fmul float %2, %T
30 %9 = fmul float %8, %T
38 %16 = fmul float %15, %T
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
float.l 46 36 0042 DEC9 [ ]*fmul
48 37 0044 D8CB [ ]*fmul %st\(3\)
49 38 0046 D8CB [ ]*fmul %st\(3\),%st
50 39 0048 DCCB [ ]*fmul %st,%st\(3\)
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/
reg-op-r.d 9 0: 10170c43 fmul \$23,\$12,\$67
reg-op.l 6 3 0000 10170C43 Main FMUL X,Y,Z
  /external/llvm/test/CodeGen/AArch64/
neon-diagnostics.ll 5 ; CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[{{[0-9]+}}]
9 %mul = fmul <2 x float> %shuffle, %b
  /external/llvm/test/CodeGen/ARM/
2012-04-10-DAGCombine.ll 16 %tmp11 = fmul float %tmp10, 1.000000e+01
21 %tmp16 = fmul <4 x float> zeroinitializer, %tmp15
fmuls.ll 21 %0 = fmul float %a, %b
44 %ret = fmul float %a, 1.0
  /external/llvm/test/CodeGen/PowerPC/
buildvec_canonicalize.ll 6 %tmp4 = fmul <4 x float> %tmp, %tmp3 ; <<4 x float>> [#uses=1]
12 ; The fmul will spill a vspltisw to create a -0.0 vector used as the addend

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