| /external/llvm/test/MC/AArch64/ |
| neon-frsqrt-frecp.s | 8 frsqrts v0.4h, v31.4h, v16.4h
9 frsqrts v4.8h, v7.8h, v15.8h
10 frsqrts v0.2s, v31.2s, v16.2s
11 frsqrts v4.4s, v7.4s, v15.4s
12 frsqrts v29.2d, v2.2d, v5.2d
14 // CHECK: frsqrts v0.4h, v31.4h, v16.4h // encoding: [0xe0,0x3f,0xd0,0x0e]
15 // CHECK: frsqrts v4.8h, v7.8h, v15.8h // encoding: [0xe4,0x3c,0xcf,0x4e]
16 // CHECK: frsqrts v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xff,0xb0,0x0e]
17 // CHECK: frsqrts v4.4s, v7.4s, v15.4s // encoding: [0xe4,0xfc,0xaf,0x4e]
18 // CHECK: frsqrts v29.2d, v2.2d, v5.2d // encoding: [0x5d,0xfc,0xe5,0x4e
[all...] |
| neon-scalar-recip.s | 21 frsqrts h21, h5, h12
22 frsqrts s21, s5, s12
23 frsqrts d8, d22, d18
25 // CHECK: frsqrts h21, h5, h12 // encoding: [0xb5,0x3c,0xcc,0x5e]
26 // CHECK: frsqrts s21, s5, s12 // encoding: [0xb5,0xfc,0xac,0x5e]
27 // CHECK: frsqrts d8, d22, d18 // encoding: [0xc8,0xfe,0xf2,0x5e]
|
| fullfp16-neon-neg.s | 168 frsqrts v0.4h, v31.4h, v16.4h
170 frsqrts v4.8h, v7.8h, v15.8h
284 frsqrts h21, h5, h12
|
| arm64-advsimd.s | 332 frsqrts.2s v0, v0, v0
403 ; CHECK: frsqrts.2s v0, v0, v0 ; encoding: [0x00,0xfc,0xa0,0x0e]
465 frsqrts.4h v0, v0, v0
490 ; CHECK: frsqrts.4h v0, v0, v0 ; encoding: [0x00,0x3c,0xc0,0x0e]
515 frsqrts.8h v0, v0, v0
540 ; CHECK: frsqrts.8h v0, v0, v0 ; encoding: [0x00,0x3c,0xc0,0x4e]
[all...] |
| neon-diagnostics.s | 397 frsqrts v0.2d, v1.2d, v2.2s
398 frsqrts v0.4h, v1.4h, v2.4h
401 // CHECK-ERROR: frsqrts v0.2d, v1.2d, v2.2s
404 // CHECK-ERROR: frsqrts v0.4h, v1.4h, v2.4h
[all...] |
| /external/clang/test/CodeGen/ |
| arm64-vrsqrt.c | 33 // CHECK: call <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float> %est, <2 x float> %val)
40 // CHECK: call <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float> %est, <4 x float> %val)
|
| arm64-scalar-test.c | 12 // CHECK: frsqrts {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
18 // CHECK: frsqrts {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-vsqrt.ll | 37 ;CHECK: frsqrts.2s
40 %tmp3 = call <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
46 ;CHECK: frsqrts.4s
49 %tmp3 = call <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
55 ;CHECK: frsqrts.2d
58 %tmp3 = call <2 x double> @llvm.aarch64.neon.frsqrts.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
62 declare <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
63 declare <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
64 declare <2 x double> @llvm.aarch64.neon.frsqrts.v2f64(<2 x double>, <2 x double>) nounwind readnone
217 ; CHECK: frsqrts s0, s0, s
[all...] |
| /frameworks/rs/driver/runtime/arch/ |
| asimd.ll | 43 declare <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
44 declare <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
[all...] |
| /external/vixl/src/vixl/a64/ |
| simulator-a64.h | [all...] |
| logic-a64.cc | 3944 LogicVRegister Simulator::frsqrts(VectorFormat vform, function in class:vixl::Simulator
3959 LogicVRegister Simulator::frsqrts(VectorFormat vform, function in class:vixl::Simulator
[all...] |
| disasm-a64.cc | [all...] |
| macro-assembler-a64.h | [all...] |
| simulator-a64.cc | [all...] |
| /external/vixl/test/ |
| test-simulator-traces-a64.h | 543 #include "traces/a64/sim-frsqrts-2d-trace-a64.h"
544 #include "traces/a64/sim-frsqrts-2s-trace-a64.h"
545 #include "traces/a64/sim-frsqrts-4s-trace-a64.h"
546 #include "traces/a64/sim-frsqrts-d-trace-a64.h"
547 #include "traces/a64/sim-frsqrts-s-trace-a64.h"
[all...] |
| test-simulator-a64.cc | [all...] |
| test-disasm-a64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| /external/vixl/doc/ |
| supported-instructions.md | [all...] |
| /external/clang/include/clang/Basic/ |
| arm_neon.td | [all...] |
| /external/valgrind/VEX/priv/ |
| host_arm64_defs.c | 697 case ARM64vecb_FRSQRTS64x2: *nm = "frsqrts"; *ar = "2d"; return;
698 case ARM64vecb_FRSQRTS32x4: *nm = "frsqrts"; *ar = "4s"; return;
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| aarch64-dis-2.c | [all...] |
| aarch64-tbl.h | [all...] |
| /prebuilts/gcc/darwin-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9/include/ |
| arm_neon.h | [all...] |
| /prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9/include/ |
| arm_neon.h | [all...] |
