| /external/llvm/test/Instrumentation/AddressSanitizer/ |
| experiment.ll | 43 define void @load16(i128* %p) sanitize_address {
45 %t = load i128, i128* %p, align 16
97 define void @store16(i128* %p) sanitize_address {
99 store i128 1, i128* %p, align 16
|
| /external/clang/test/CodeGen/ |
| arm64-arguments.c | 219 // CHECK: define <4 x i32> @f36(i32 %i, i128 %s1.coerce, i128 %s2.coerce)
222 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 16
223 // CHECK: store i128 %s2.coerce, i128* %{{.*}}, align 16
328 // CHECK: define i32 @f39(i32 %i, i128 %s1.coerce, i128 %s2.coerce)
331 // CHECK: store i128 %s1.coerce, i128* %{{.*}}, align 1
[all...] |
| x86_64-atomic-128.c | 9 // CHECK: atomicrmw add i128
|
| /external/llvm/test/Analysis/CostModel/PowerPC/ |
| load_store.ll | 16 store i128 undef, i128* undef, align 4
30 load i128, i128* undef, align 4
|
| /external/llvm/test/CodeGen/AArch64/ |
| aarch-multipart.ll | 3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
| aarch64-2014-12-02-combine-soften.ll | 2 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
|
| arm64-arm64-dead-def-elimination-flag.ll | 3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
| fast-isel-call-return.ll | 2 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
|
| fastcc.ll | 26 call fastcc void @func_stack32([8 x i32] undef, i128 0, i128 9)
76 call fastcc void @func_stack32([8 x i32] undef, i128 0, i128 9)
103 define fastcc void @func_stack32([8 x i32], i128 %stacked0, i128 %stacked1) {
119 call fastcc void @func_stack32([8 x i32] undef, i128 0, i128 9)
|
| i128-align.ll | 3 %struct = type { i32, i128, i8 }
24 %endi = ptrtoint i128* %endp to i64
|
| arm64-ldxr-stxr.ll | 5 define i128 @f0(i8* %p) nounwind readonly {
12 %2 = zext i64 %0 to i128
13 %3 = zext i64 %1 to i128
14 %shl = shl nuw i128 %2, 64
15 %4 = or i128 %shl, %3
16 ret i128 %4
19 define i32 @f1(i8* %ptr, i128 %val) nounwind {
23 %tmp4 = trunc i128 %val to i64
24 %tmp6 = lshr i128 %val, 64
25 %tmp7 = trunc i128 %tmp6 to i6
[all...] |
| func-calls.ll | 12 @var128 = global i128 0
76 declare i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45,
85 call i32 @struct_on_stack(i8 0, i16 12, i32 42, i64 99, i128 1,
120 i32 %stack1, i128 %stack2)
122 declare void @check_i128_regalign(i32 %val0, i128 %val1)
127 %val = load i128, i128* @var128
130 i32 42, i128 %val)
140 call void @check_i128_regalign(i32 0, i128 42)
|
| arm64-dead-def-frame-index.ll | 3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
| br-undef-cond.ll | 5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
| /external/llvm/test/CodeGen/Mips/ |
| check-adde-redundant-moves.ll | 29 define i128 @add_i128(i128 %a) {
33 %r = add i128 5, %a
34 ret i128 %r
|
| /external/llvm/test/Transforms/ConstProp/ |
| basictest.ll | 47 define i128 @vector_to_int_cast() {
48 %A = bitcast <4 x i32> <i32 1073741824, i32 1073741824, i32 1073741824, i32 1073741824> to i128
49 ret i128 %A
51 ; CHECK: ret i128 85070591750041656499021422275829170176
|
| /external/llvm/test/Transforms/InstCombine/ |
| apint-sub.ll | 112 define i128 @test18(i128 %Y) {
113 %tmp.4 = shl i128 %Y, 2 ; <i128> [#uses=1]
114 %tmp.12 = shl i128 %Y, 2 ; <i128> [#uses=1]
115 %tmp.8 = sub i128 %tmp.4, %tmp.12 ; <i128> [#uses=1]
116 ret i128 %tmp.8
|
| phi.ll | 231 %tmp42 = zext i64 %tmp41 to i128
235 %tmp36 = zext i64 %Val to i128 ; <i128> [#uses=1]
236 %tmp37 = shl i128 %tmp36, 64 ; <i128> [#uses=1]
237 %ins39 = or i128 %tmp42, %tmp37 ; <i128> [#uses=1]
241 %tmp869.0 = phi i128 [ %tmp42, %entry ], [ %ins39, %two ]
242 %tmp32 = trunc i128 %tmp869.0 to i64 ; <i64> [#uses=1]
243 %tmp29 = lshr i128 %tmp869.0, 64 ; <i128> [#uses=1
[all...] |
| /external/llvm/test/Bitcode/ |
| shuffle.ll | 18 i128 bitcast (<2 x double> bitcast (
20 to i128) to i96)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ppcf128-endian.ll | 90 define i128 @convert_from(ppc_fp128 %x) {
92 %0 = bitcast ppc_fp128 %x to i128
93 ret i128 %0
102 define ppc_fp128 @convert_to(i128 %x) {
104 %0 = bitcast i128 %x to ppc_fp128
114 define ppc_fp128 @convert_to2(i128 %x) {
116 %shl = shl i128 %x, 1
117 %0 = bitcast i128 %shl to ppc_fp128
|
| fp128-bitcast-after-operation.ll | 7 define i128 @test_abs(ppc_fp128 %x) nounwind {
45 %1 = bitcast ppc_fp128 %0 to i128
46 ret i128 %1
49 define i128 @test_neg(ppc_fp128 %x) nounwind {
87 %1 = bitcast ppc_fp128 %0 to i128
88 ret i128 %1
91 define i128 @test_copysign(ppc_fp128 %x) nounwind {
132 %1 = bitcast ppc_fp128 %0 to i128
133 ret i128 %1
|
| /external/llvm/test/Transforms/BBVectorize/X86/ |
| vs-cast.ll | 7 %0 = bitcast <2 x i64> undef to i128
8 %1 = bitcast <2 x i64> undef to i128
|
| /external/llvm/lib/Target/SystemZ/ |
| README.txt | 141 define void @f4a(i128 *%aptr, i64 %base) {
143 %bptr = inttoptr i64 %addr to i128 *
144 %a = load volatile i128 *%aptr
145 %b = load i128 *%bptr
146 %add = add i128 %a, %b
147 store i128 %add, i128 *%aptr
|
| /external/llvm/test/Transforms/ScalarRepl/ |
| 2011-06-17-VectorPartialMemset.ll | 7 ; CHECK: %[[A:[a-z0-9]*]] = and i128 undef, -16777216
8 ; CHECK: %[[B:[a-z0-9]*]] = bitcast i128 %[[A]] to <4 x float>
24 ; CHECK: and i128
|
| /external/llvm/test/Analysis/CostModel/X86/ |
| load_store.ll | 17 store i128 undef, i128* undef, align 4
45 load i128, i128* undef, align 4
|
