/external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
mismatched-intrinsics.ll | 2 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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load-store-q.ll | 2 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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/external/llvm/test/Transforms/SimplifyCFG/ |
switch-dead-default.ll | 71 define void @test4(i128 %a) { 73 switch i128 %a, label %default [i128 0, label %case0 74 i128 1, label %case1]
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/external/llvm/test/CodeGen/X86/ |
peep-test-4.ll | 120 define zeroext i1 @adc(i128 %x) nounwind { 121 %add = add i128 %x, 9223372036854775808 122 %cmp = icmp ult i128 %add, 18446744073709551616 131 define zeroext i1 @sbb(i128 %x, i128 %y) nounwind { 132 %sub = sub i128 %x, %y 133 %cmp = icmp sge i128 %sub, 0
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add-nsw-sext.ll | 125 define i128* @gep128(i32 %i, i128* %x) { 135 %idx = getelementptr i128, i128* %x, i64 %ext 136 ret i128* %idx
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/external/llvm/test/CodeGen/Generic/ |
switch-lower.ll | 7 switch i128 undef, label %exit [ 8 i128 55340232221128654848, label %exit 9 i128 92233720368547758080, label %exit 10 i128 73786976294838206464, label %exit 11 i128 147573952589676412928, label %exit
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
add.ll | 95 define signext i128 @add_i128(i128 signext %a, i128 signext %b) { 121 %r = add i128 %a, %b 122 ret i128 %r
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srem.ll | 128 define signext i128 @srem_i128(i128 signext %a, i128 signext %b) { 137 %r = srem i128 %a, %b 138 ret i128 %r
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sub.ll | 95 define signext i128 @sub_i128(i128 signext %a, i128 signext %b) { 120 %r = sub i128 %a, %b 121 ret i128 %r
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/external/llvm/test/CodeGen/NVPTX/ |
load-with-non-coherent-cache.ll | 57 ; i128 is non standard integer in nvptx64 64 define void @foo6(i128 * noalias readonly %from, i128 * %to) { 65 %1 = load i128, i128 * %from 66 store i128 %1, i128 * %to 251 !6 = !{void (i128 *, i128 *)* @foo6, !"kernel", i32 1}
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/external/llvm/test/CodeGen/AArch64/ |
arm64-dagcombiner-load-slicing.ll | 82 %0 = bitcast %class.Complex_long* %arrayidx to i128* 83 %1 = load i128, i128* %0, align 4 84 %t0.sroa.0.0.extract.trunc = trunc i128 %1 to i64 86 %t0.sroa.2.0.extract.shift = lshr i128 %1, 64 87 %t0.sroa.2.0.extract.trunc = trunc i128 %t0.sroa.2.0.extract.shift to i64
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aarch64-DAGCombine-findBetterNeighborChains-crash.ll | 4 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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aarch64_tree_tests.ll | 4 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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arm64-ands-bad-peephole.ll | 5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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fast-isel-address-extends.ll | 3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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stackmap-liveness.ll | 3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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tailcall-implicit-sret.ll | 4 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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/external/llvm/test/Transforms/InstCombine/ |
bitcast.ll | 51 %tmp = bitcast <2 x i64> %B to i128 52 %tmp1 = lshr i128 %tmp, 64 53 %tmp2 = trunc i128 %tmp1 to i32 111 define double @bitcast_extelt4(i128 %A) { 112 %bc1 = bitcast i128 %A to <2 x i64> 118 ; CHECK-NEXT: %bc = bitcast i128 %A to <2 x double>
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/external/clang/test/OpenMP/ |
atomic_capture_codegen.cpp | 244 // CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic 247 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] 248 // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* 249 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]] 250 // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* 251 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1] [all...] |
atomic_update_codegen.cpp | 225 // CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic 228 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] 229 // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* 230 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]], 231 // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* 232 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]] [all...] |
/external/clang/test/CodeGenCXX/ |
const-init.cpp | 62 // CHECK: @PR11705 = global i128 0 66 // CHECK: @_ZZ23UnfoldableAddrLabelDiffvE1x = internal global i128 0
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/external/llvm/test/Transforms/ScalarRepl/ |
inline-vector.ll | 35 %tmp3.i = zext i64 %tmp2.i to i128 36 %tmp10.i = bitcast i128 %tmp3.i to <4 x float>
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/external/clang/test/CodeGen/ |
bmi2-builtins.c | 51 // CHECK: mul i128
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/external/llvm/test/Transforms/LoopVectorize/AArch64/ |
sdiv-pow2.ll | 2 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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/frameworks/compile/libbcc/tests/libbcc/ |
tbaa.ll | 7 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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