| /external/llvm/test/Transforms/LoopVectorize/ |
| interleaved-accesses.ll | 3 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
|
| /external/valgrind/VEX/pub/ |
| libvex_ir.h | 504 Iop_DivModS64to64, // :: I64,I64 -> I128
535 Iop_128to64, // :: I128 -> I64, low half
536 Iop_128HIto64, // :: I128 -> I64, high half
537 Iop_64HLto128, // :: (I64,I64) -> I128
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | [all...] |
| LegalizeTypes.cpp | 765 // but sometimes softened to i128.
[all...] |
| LegalizeDAG.cpp | [all...] |
| /external/clang/include/clang/Basic/ |
| Builtins.def | 505 // types of i8, i16, i32, i64, and i128. The front-end sees calls to the
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| SROA.cpp | [all...] |
| /external/llvm/test/CodeGen/X86/ |
| x86-shrink-wrapping.ll | 10 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
|
| /external/valgrind/lackey/ |
| lk_main.c | 339 case 5: return "I128"; break;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 175 setOperationAction(ISD::FP_TO_SINT, MVT::i128, Custom);
178 setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom);
181 setOperationAction(ISD::SINT_TO_FP, MVT::i128, Custom);
184 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 485 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, MVT::i128, Custom);
[all...] |
| X86TargetTransformInfo.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelDAGToDAG.cpp | 412 if (N->getValueType(0) == MVT::i128) {
[all...] |
| /frameworks/compile/libbcc/lib/Renderscript/ |
| RSKernelExpand.cpp | 192 // 2xi64 and i128 suggest an upconverted struct type, which are also unsupported
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
| /art/test/083-compiler-regressions/src/ |
| Main.java | 1592 int i128 = 128; local
[all...] |
| /external/clang/lib/Basic/ |
| Targets.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 669 else if (VT == MVT::i128)
676 else if (VT == MVT::i128)
700 if (VT == MVT::i128)
[all...] |
| /external/valgrind/VEX/priv/ |
| host_ppc_isel.c | 462 /* 64-bit mode ONLY: compute an I128 into a GPR64 pair. */
[all...] |
| /external/clang/lib/CodeGen/ |
| CGBuiltin.cpp | 242 // read as an i128. The "store" will put the higher-order double in the
244 // will treat those bits as a different part of the i128: the low bits in
[all...] |
| /external/llvm/lib/IR/ |
| ConstantFold.cpp | 187 // endianness. The memory layout of i128, however, depends on the target
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCasts.cpp | 436 /// trunc (lshr (bitcast <4 x i32> %X to i128), 32) to i32
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| aarch64-minmaxv.ll | 3 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
[all...] |
| /frameworks/rs/driver/runtime/arch/ |
| asimd.ll | 1 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
[all...] |
| /frameworks/rs/driver/runtime/ll64/ |
| allocation.ll | 1 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
[all...] |
