/external/llvm/test/MC/Mips/ |
nacl-mask.s | 252 jalr $t9 284 # CHECK-NEXT: jalr $25 301 jalr $t9 319 # CHECK-NEXT: jalr
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r-mips-got-disp.s | 36 jalr $25
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xgot.s | 48 jalr $25
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/art/runtime/arch/mips64/ |
quick_entrypoints_mips64.S | 183 jalr $zero, $ra 325 jalr $zero, $t9 # artDeliverPendingExceptionFromCode(Thread*) 334 jalr $zero, $ra 344 jalr $zero, $ra # return on success 354 jalr $zero, $ra # return on success 458 jalr $zero, $ra 488 jalr $zero, $t9 # Jump to the OSR entry point. 566 jalr $zero, $t9 # do long jump (do not use ra, it must not be clobbered) 579 jalr $zero, $t9 # artDeliverExceptionFromCode(Throwable*, Thread*) 591 jalr $zero, $t9 # artThrowNullPointerExceptionFromCode(Thread* [all...] |
/external/llvm/test/CodeGen/Mips/ |
eh-return32.ll | 47 ; R6: jr $ra # <MCInst #{{[0-9]+}} JALR 87 ; R6: jr $ra # <MCInst #{{[0-9]+}} JALR
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eh-return64.ll | 48 ; R6: jr $ra # <MCInst #{{[0-9]+}} JALR 90 ; R6: jr $ra # <MCInst #{{[0-9]+}} JALR
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ehframe-indirect.ll | 17 ; ALL: jalr
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/external/llvm/test/MC/Mips/mips2/ |
invalid-mips32.s | 15 jalr.hb $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 16 jalr.hb $4, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/v8/src/mips/ |
constants-mips.cc | 163 case JALR: 205 case JALR:
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/external/v8/src/mips64/ |
constants-mips64.cc | 163 case JALR: 205 case JALR:
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/or1k/ |
allinsn.s | 49 l.jalr r0 50 l.jalr r31 51 l.jalr r16 52 l.jalr r15 53 l.jalr r1 54 l.jalr r27 55 l.jalr r14 56 l.jalr r22
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
compressed-plt-1-o32-mips16-only.od | 17 .*: 0320f809 jalr \$25 74 .*: 0320f809 jalr \$25
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compressed-plt-1-o32-se.od | 14 .*: 0320f809 jalr \$25 59 .*: 0320f809 jalr \$25
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/ |
sample.d | 57 00000024 \<jalr\>: 58 24: 0552 jalr r1 59 26: 1d5f 0c02 jalr r31
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/iq2000/ |
allinsn.s | 516 .global jalr 517 jalr: label 518 jalr %0,%0
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tilegx/ |
t_insns.d | 317 998: [0-9a-f]* { add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } 426 d00: [0-9a-f]* { addi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 } [all...] |
/art/runtime/interpreter/mterp/mips/ |
header.S | 264 jalr zero, rd 268 jalr zero, rd 337 jalr zero, dst; \ 353 jalr zero, dst; \
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/bionic/libc/arch-mips/bionic/ |
crtbegin.c | 85 " jalr $t9 \n"
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/bionic/linker/arch/mips/ |
begin.S | 100 jalr $t9
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/development/ndk/platforms/android-9/arch-mips/src/ |
crtbegin.c | 103 " jalr $t9 \n"
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/external/v8/src/debug/mips/ |
debug-mips.cc | 53 // call t9 (jalr t9 / nop instruction pair)
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/external/v8/src/debug/mips64/ |
debug-mips64.cc | 54 // call t9 (jalr t9 / nop instruction pair)
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/system/core/libpixelflinger/tests/arch-mips64/disassembler/ |
mips64_disassembler_test.cpp | 72 { 0x00201009, "jalr\tv0,at" }, 73 { 0x0020f809, "jalr\tat" },
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/art/runtime/interpreter/mterp/out/ |
mterp_mips64.S | [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
micromips.s | 673 jalr $31, $0 674 jalr $2 675 jalr $3 676 jalr $4 677 jalr $5 678 jalr $6 679 jalr $7 680 jalr $8 681 jalr $30 693 jalr $31, $ [all...] |