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  /external/llvm/
README.txt 1 Low Level Virtual Machine (LLVM)
  /external/llvm/lib/CodeGen/
MachineLoopInfo.cpp 30 INITIALIZE_PASS_BEGIN(MachineLoopInfo, "machine-loops",
31 "Machine Natural Loop Construction", true, true)
33 INITIALIZE_PASS_END(MachineLoopInfo, "machine-loops",
34 "Machine Natural Loop Construction", true, true)
  /external/llvm/lib/Target/AMDGPU/
R600MachineFunctionInfo.cpp 1 //===-- R600MachineFunctionInfo.cpp - R600 Machine Function Info-*- C++ -*-===//
  /external/llvm/lib/Target/Hexagon/
HexagonMachineFunctionInfo.cpp 1 //= HexagonMachineFunctionInfo.cpp - Hexagon machine function info *- C++ -*-=//
  /external/llvm/lib/Target/MSP430/
MSP430MachineFunctionInfo.cpp 1 //===-- MSP430MachineFunctionInfo.cpp - MSP430 machine function info ------===//
  /external/llvm/lib/Target/Sparc/
SparcMachineFunctionInfo.cpp 1 //===-- SparcMachineFunctionInfo.cpp - Sparc Machine Function Info --------===//
  /external/llvm/lib/Target/SystemZ/
SystemZMachineFunctionInfo.cpp 1 //=== SystemZMachineFunctionInfo.cpp - SystemZ machine function info ------===//
  /external/llvm/test/CodeGen/AArch64/
arm64-simplest-elf.ll 13 ; machine with correct section & symbol names.
fast-isel-switch-phi.ll 3 ; Test that the Machine Instruction PHI node doesn't have more than one operand
  /external/llvm/test/CodeGen/AMDGPU/
legalizedag-bug-expand-setcc.ll 7 ; This bug caused the icmp IR instruction to be expanded to two machine
  /external/llvm/test/CodeGen/Generic/
print-machineinstrs.ll 9 ; CHECK: Machine code for function foo:
  /external/llvm/test/CodeGen/MIR/Generic/
expected-mbb-reference-for-successor-mbb.mir 22 ; CHECK: [[@LINE+1]]:29: expected a machine basic block reference
machine-function-missing-function.mir 3 # one of the machine functions has a name that doesn't match any function in
register-info.mir 2 # This test ensures that the MIR parser parses machine register info properties
  /external/llvm/test/CodeGen/MIR/X86/
expected-comma-after-memory-operand.mir 22 ; CHECK: [[@LINE+1]]:87: expected ',' before the next machine memory operand
immediate-operands.mir 2 # This test ensures that the MIR parser parses immediate machine operands.
missing-closing-quote.mir 18 ; CHECK: [[@LINE+1]]:48: end of machine instruction reached before the closing '"'
  /external/llvm/test/CodeGen/Mips/
machineverifier.ll 2 ; Make sure machine verifier understands the last instruction of a basic block
mipslopat.ll 1 ; This test does not check the machine code output.
  /external/llvm/test/CodeGen/PowerPC/
2009-07-16-InlineAsm-M-Operand.ll 3 ; Machine code verifier will call isRegTiedToDefOperand() on /all/ register use
  /external/llvm/test/Object/Inputs/COFF/
weak-external.yaml 3 Machine: IMAGE_FILE_MACHINE_I386
  /external/llvm/test/Object/Mips/
elf-abi.yaml 55 Machine: EM_MIPS
77 Machine: EM_MIPS
99 Machine: EM_MIPS
121 Machine: EM_MIPS
  /external/llvm/test/Object/X86/
yaml2obj-elf-x86-rel.yaml 14 Machine: EM_386
  /external/llvm/test/Object/
yaml2obj-elf-section-invalid-size.yaml 8 Machine: EM_X86_64
yaml2obj-elf-symbol-LocalGlobalWeak.yaml 7 Machine: EM_X86_64

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