| /art/compiler/utils/x86/ |
| assembler_x86.h | 385 void mulss(XmmRegister dst, XmmRegister src);
386 void mulss(XmmRegister dst, const Address& src);
|
| /external/v8/test/cctest/ |
| test-disasm-ia32.cc | 406 __ mulss(xmm1, xmm0);
407 __ mulss(xmm1, Operand(ebx, ecx, times_4, 10000));
|
| test-disasm-x64.cc | 401 __ mulss(xmm1, xmm0);
402 __ mulss(xmm1, Operand(rbx, rcx, times_4, 10000));
|
| /external/valgrind/none/tests/amd64/ |
| insn_sse.def | 89 mulss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[5.0,4.0,3.0,2.0] => 1.ps[61.70,4.0,3.0,2.0]
90 mulss m128.ps[12.34,56.78,43.21,87.65] xmm.ps[5.0,4.0,3.0,2.0] => 1.ps[61.70,4.0,3.0,2.0]
|
| /external/valgrind/none/tests/x86/ |
| insn_sse.def | 89 mulss xmm.ps[12.34,56.78,43.21,87.65] xmm.ps[5.0,4.0,3.0,2.0] => 1.ps[61.70,4.0,3.0,2.0]
90 mulss m128.ps[12.34,56.78,43.21,87.65] xmm.ps[5.0,4.0,3.0,2.0] => 1.ps[61.70,4.0,3.0,2.0]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| simd-intel.d | 66 [ ]*[a-f0-9]+: f3 0f 59 00 mulss xmm0,DWORD PTR \[eax\]
159 [ ]*[a-f0-9]+: f3 0f 59 00 mulss xmm0,DWORD PTR \[eax\]
|
| simd-suffix.d | 66 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%eax\),%xmm0
159 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%eax\),%xmm0
|
| simd.d | 65 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%eax\),%xmm0
158 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%eax\),%xmm0
|
| x86-64-simd-intel.d | 86 [ ]*[a-f0-9]+: f3 0f 59 00 mulss xmm0,DWORD PTR \[rax\]
205 [ ]*[a-f0-9]+: f3 0f 59 00 mulss xmm0,DWORD PTR \[rax\]
|
| x86-64-simd-suffix.d | 86 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0
205 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0
|
| x86-64-simd.d | 85 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0
204 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64_test.cc | [all...] |
| assembler_x86_64.h | 410 void mulss(XmmRegister dst, XmmRegister src);
411 void mulss(XmmRegister dst, const Address& src);
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| sse-intrinsics-x86.ll | 172 ; CHECK: mulss
|
| machine-combiner.ll | 153 ; SSE-NEXT: mulss %xmm3, %xmm2
154 ; SSE-NEXT: mulss %xmm2, %xmm0
|
| /external/valgrind/memcheck/tests/amd64/ |
| sse_memory.c | 224 TEST_INSN( &AllMask, SS,mulss)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-simd-intel.d | 86 [ ]*[a-f0-9]+: f3 0f 59 00 mulss xmm0,DWORD PTR \[rax\]
205 [ ]*[a-f0-9]+: f3 0f 59 00 mulss xmm0,DWORD PTR \[rax\]
|
| x86-64-simd-suffix.d | 86 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0
205 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0
|
| x86-64-simd.d | 86 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0
205 [ ]*[a-f0-9]+: f3 0f 59 00 mulss \(%rax\),%xmm0
|
| /external/llvm/lib/Target/X86/ |
| README-SSE.txt | 216 mulss %xmm1, %xmm1
221 Because mulss doesn't modify the top 3 elements, the top elements of
225 mulss %xmm0, %xmm0
|
| /external/v8/src/compiler/ia32/ |
| code-generator-ia32.cc | 625 __ mulss(i.InputDoubleRegister(0), i.InputOperand(1));
630 // when there is a (v)mulss depending on the result.
804 // when there is a (v)mulss depending on the result.
[all...] |
| /external/v8/src/compiler/x64/ |
| code-generator-x64.cc | [all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.h | 919 void mulss(XMMRegister dst, XMMRegister src) { mulss(dst, Operand(src)); }
920 void mulss(XMMRegister dst, const Operand& src);
[all...] |
| /bionic/libm/x86/ |
| e_log10.S | 110 mulss %xmm7, %xmm0
|
| /bionic/libm/x86_64/ |
| e_log10.S | 92 mulss %xmm7, %xmm0
|
