/external/valgrind/VEX/priv/ |
host_ppc_defs.c | 110 /* For both ppc32-linux and ppc64-linux, f14-f31 are callee save. 122 /* For both ppc32-linux and ppc64-linux, v20-v31 are callee save. [all...] |
/external/ltrace/sysdeps/linux-gnu/ppc/ |
plt.c | 123 * On PPC32 with secure PLT, the address of IFUNC symbols in main 273 * PPC32 secure PLT case does. */ 439 /* For PPC32 BSS, it is important whether the binary was 450 /* On PPC64 and PPC32 secure, IRELATIVE relocations actually 503 /* By exhaustion--PPC32 BSS. */ 596 * addresses. On PPC32 we read from .plt, which contains 4 719 /* On PPC32 with BSS PLT, delay the symbol 896 * The situation on PPC32 BSS is more complicated. The 903 * instruction block does the update every time. So on PPC32, [all...] |
fetch.c | 39 * whether ltrace is PPC32 or PPC64. 41 * This is PPC64 definition. The PPC32 is simply an array of 33
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/external/valgrind/ |
Android.mk | 222 coregrind/m_dispatch/dispatch-ppc32-linux.S \ 246 coregrind/m_sigframe/sigframe-ppc32-linux.c \ 255 coregrind/m_syswrap/syscall-ppc32-linux.S \ 270 coregrind/m_syswrap/syswrap-ppc32-linux.c \ 294 coregrind/m_gdbserver/valgrind-low-ppc32.c \
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glibc-2.3.supp | 510 ## MontaVista 3.1 on ppc32 integer only 512 MontaVista-3.1-ppc32-#1 521 MontaVista-3.1-ppc32-#2 530 MontaVista-3.1-ppc32-#3 550 # MontaVista Linux 4.0.1 on ppc32
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glibc-2.6.supp | 241 # MontaVista Linux 4.0.1 on ppc32 257 # ppc32 running openSUSE 10.3
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README_PACKAGERS | 21 the past. As of version 3.3.0, on some targets (ppc32-linux,
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/ |
configure | 106 all_platforms="${all_platforms} ppc32-darwin8-gcc" 107 all_platforms="${all_platforms} ppc32-darwin9-gcc" 108 all_platforms="${all_platforms} ppc32-linux-gcc" 235 ppc32 598 fat_bin_archs="$fat_bin_archs ppc32-${tgt_os}-gcc"
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/external/valgrind/coregrind/ |
pub_core_machine.h | 213 ppc32: initially: call VG_(machine_get_hwcaps) 269 /* PPC32: set to 1 if FP instructions are supported in user-space, 276 /* PPC32: set to 1 if Altivec instructions are supported in
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m_machine.c | 40 #include "pub_core_libcsignal.h" // for ppc32 messing with SIGILL and SIGFPE 81 regs->misc.PPC32.r_lr 484 (2) from the AT_SYSINFO entries the kernel gave us (ppc32 cache 516 /* For hwcaps detection on ppc32/64, s390x, and arm we'll need to do SIGILL [all...] |
pub_core_basics.h | 71 } PPC32;
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pub_core_transtab_asm.h | 40 On ppc32/ppc64/mips32/mips64/arm64, the bottom two bits of
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Makefile.am | 362 m_dispatch/dispatch-ppc32-linux.S \ 387 m_gdbserver/valgrind-low-ppc32.c \ 410 m_sigframe/sigframe-ppc32-linux.c \ 423 m_syswrap/syscall-ppc32-linux.S \ 444 m_syswrap/syswrap-ppc32-linux.c \
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/external/valgrind/docs/internals/ |
t-chaining-notes.txt | 5 assert. [DONE: amd64 x86 ppc32 ppc64 arm s390] 13 function patchProfInc_<arch> [DONE: amd64 x86 ppc32 ppc64 arm s390]
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MERGE_3_10_1.txt | 161 //2990 Add detection of old ppc32 magic instructions from bug 278808.
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/external/valgrind/include/vki/ |
vki-scnums-ppc32-linux.h | 3 /*--- System call numbers for ppc32-linux. ---*/ 4 /*--- vki-scnums-ppc32-linux.h ---*/
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/external/elfutils/libdwfl/ |
frame_unwind.c | 457 /* PPC32 vDSO has such invalid operations. */ 596 /* PPC32 vDSO has various invalid operations, ignore them. The 598 But PPC32 does not use such registers. */ 635 /* PPC32 __libc_start_main properly CFI-unwinds PC as zero. Currently
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/external/llvm/test/CodeGen/PowerPC/ |
2009-09-18-carrybit.ll | 1 ; RUN: llc -march=ppc32 < %s | FileCheck %s
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MergeConsecutiveStores.ll | 1 ; RUN: llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec < %s | FileCheck %s
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branch-opt.ll | 1 ; RUN: llc < %s -march=ppc32 | \
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vec_mul.ll | 1 ; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -march=ppc32 -mattr=+altivec -mattr=-vsx -mattr=-power8-altivec | FileCheck %s
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/external/valgrind/VEX/pub/ |
libvex_emnote.h | 82 /* unmasking PPC32/64 FP exceptions is not supported */
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/external/valgrind/coregrind/m_gdbserver/ |
valgrind_low.h | 35 ppc32 or ...). */
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/external/valgrind/memcheck/tests/vbit-test/ |
vtest.h | 96 unsigned ppc32 : 1; member in struct:__anon27039
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/external/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.cpp | 698 // LROffset is positive), that slot is callee-owned. Because PPC32 SVR4 has no 700 // overwrite it, so PPC32 SVR4 must claim at least a minimal frame to save LR. 768 // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe. 775 // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe. 782 // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe. 789 // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe. 820 else // PPC32... [all...] |