| /prebuilts/go/darwin-x86/src/runtime/ |
| asm_arm.s | 94 MOVB runtime·goarm(SB), R11
95 CMP $5, R11
97 WORD $0xeef1ba10 // vmrs r11, fpscr
98 BIC $(1<<24), R11
99 WORD $0xeee1ba10 // vmsr fpscr, r11
113 MOVW $0, R11
114 MOVW R11, gobuf_lr(R0)
115 MOVW R11, gobuf_ret(R0)
116 MOVW R11, gobuf_ctxt(R0)
140 MOVW $0, R11
[all...] |
| /prebuilts/go/linux-x86/src/crypto/rc4/ |
| rc4_amd64p32.s | 71 LEAL (R10)(DX*4), R11
72 MOVBLZX (R11), BX // ty = d[y]
77 MOVB AX, (R11) // d[y] = tx
112 LEAL (R10)(DX*4), R11; \
113 MOVBLZX (R11), R8; \
114 MOVB r1, (R11); \
173 LEAL (R10)(DX*4), R11
174 MOVBLZX (R11), BX // ty = d[y]
179 MOVB AX, (R11) // d[y] = tx
|
| /prebuilts/go/linux-x86/src/runtime/ |
| asm_arm.s | 94 MOVB runtime·goarm(SB), R11
95 CMP $5, R11
97 WORD $0xeef1ba10 // vmrs r11, fpscr
98 BIC $(1<<24), R11
99 WORD $0xeee1ba10 // vmsr fpscr, r11
113 MOVW $0, R11
114 MOVW R11, gobuf_lr(R0)
115 MOVW R11, gobuf_ret(R0)
116 MOVW R11, gobuf_ctxt(R0)
140 MOVW $0, R11
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/ |
| opt.d | 49 138: 0444418b 88689182 ldw.s r4, @\(r6\+, r11\) -> adds.s r9, r6, 0x2
50 140: 044c418b 08689182 ldw.s r4, @\(r6-, r11\) || adds.s r9, r6, 0x2
51 148: 054c418b 88689182 stw.s r4, @\(r6-, r11\) -> adds.s r9, r6, 0x2
52 150: 0440418b 08689182 ldw.s r4, @\(r6, r11\) || adds.s r9, r6, 0x2
53 158: 0440418b 08689182 ldw.s r4, @\(r6, r11\) || adds.s r9, r6, 0x2
65 198: 05508209 8990a2cc st4hb.s r8, @\(r8, r9\) -> subhllh.s r10, r11, r12
83 1d8: 0440a2c0 00f00000 ldw.s r10, @\(r11, r0\) || nop
89 208: 0440a2c0 8440a2c0 ldw.s r10, @\(r11, r0\) -> ldw.s r10, @\(r11, r0\)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/fr30/ |
| allinsn.s | 24 sub r10, r11
51 or r11, @r12
85 beorh #1, @r11
131 lsr r11, r12
159 lduh @r10, r11
179 sth r11, @(r13, r12)
250 jmp:d @r11
349 extsh r11
384 ldm1 (r8, r11, r15)
|
| /external/llvm/lib/Target/BPF/ |
| BPFRegisterInfo.td | 33 def R11 : Ri<11, "r11">, DwarfRegNum<[11]>;
39 R11, // stack ptr
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_PredictIntra_16x16_s.S | 82 ADD r11,r3,r5
89 VST1.8 {d0,d1},[r11],r5
93 VST1.8 {d0,d1},[r11],r5
97 VST1.8 {d0,d1},[r11],r5
101 VST1.8 {d0,d1},[r11],r5
107 MOV r11,#0
129 ADD r11,r11,#1
138 ADD r11,r11,#
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| x86-64-tbm.s | 33 BEXTR $0x70CB4039,0xDB68(%r11,%r13),%r13
37 BEXTR $0x7BEEEEEF,(%rdi),%r11
43 BLCFILL (%r11),%r9d
55 BLCFILL %r13,%r11
69 BLCFILL %r11,%rcx
86 BLCI (%ebx),%r11
109 BLCIC (%r11),%edi
113 BLCIC 0x141AD0A7(,%r11),%r15d
129 BLCIC (%ebx),%r11
159 BLCMSK (%r11),%r1
[all...] |
| /external/boringssl/linux-x86_64/crypto/aes/ |
| vpaes-x86_64.S | 23 movq $16,%r11
50 movdqa -64(%r11,%r10,1),%xmm1
52 movdqa (%r11,%r10,1),%xmm4
61 addq $16,%r11
64 andq $48,%r11
98 movdqa 64(%r11,%r10,1),%xmm1
117 movq %rax,%r11
120 shlq $4,%r11
124 xorq $48,%r11
127 andq $48,%r11
[all...] |
| /external/boringssl/mac-x86_64/crypto/aes/ |
| vpaes-x86_64.S | 23 movq $16,%r11
50 movdqa -64(%r11,%r10,1),%xmm1
52 movdqa (%r11,%r10,1),%xmm4
61 addq $16,%r11
64 andq $48,%r11
98 movdqa 64(%r11,%r10,1),%xmm1
117 movq %rax,%r11
120 shlq $4,%r11
124 xorq $48,%r11
127 andq $48,%r11
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_intra_pred_chroma_mode_27_to_33.s | 142 mov r11,#2
163 vld1.8 {d8},[r10],r11 @(i row)ref_main_idx
174 vld1.8 {d12},[r12],r11 @(ii)ref_main_idx
189 vld1.8 {d16},[r10],r11 @(iii)ref_main_idx
195 vld1.8 {d20},[r12],r11 @(iv)ref_main_idx
214 vld1.8 {d8},[r10],r11 @(v)ref_main_idx
235 vld1.8 {d12},[r12],r11 @(vi)ref_main_idx
248 vld1.8 {d16},[r10],r11 @(vii)ref_main_idx
261 vld1.8 {d20},[r12],r11 @(viii)ref_main_idx
291 vld1.8 {d8},[r10],r11 @(i)ref_main_id
[all...] |
| ihevc_intra_pred_luma_mode_27_to_33.s | 146 mov r11,#1
166 vld1.8 {d8},[r10],r11 @(i row)ref_main_idx
177 vld1.8 {d12},[r12],r11 @(ii)ref_main_idx
192 vld1.8 {d16},[r10],r11 @(iii)ref_main_idx
198 vld1.8 {d20},[r12],r11 @(iv)ref_main_idx
216 vld1.8 {d8},[r10],r11 @(v)ref_main_idx
237 vld1.8 {d12},[r12],r11 @(vi)ref_main_idx
250 vld1.8 {d16},[r10],r11 @(vii)ref_main_idx
263 vld1.8 {d20},[r12],r11 @(viii)ref_main_idx
292 vld1.8 {d8},[r10],r11 @(i)ref_main_id
[all...] |
| ihevc_sao_edge_offset_class0_chroma.s | 79 ADD r11,r3,r9 @pu1_src_top[wd]
83 LDRH r12,[r11,#-2] @pu1_src_top[wd - 1]
146 LDRH r11,[r2] @load pu1_src_left since ht - row =0 when it comes first pu1_src_left is incremented later
153 VMOV.16 D15[3],r11 @vsetq_lane_u16(pu1_src_left[ht - row], pu1_cur_row_tmp, 14,15)
162 LDRH r11,[r2,#2] @II load pu1_src_left since ht - row =0
166 VMOV.16 D29[3],r11 @II vsetq_lane_u16(pu1_src_left[ht - row], pu1_cur_row_tmp, 14,15)
173 LDRB r11,[r12,#16] @pu1_src_cpy[16]
176 VMOV.8 D14[0],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_row_tmp, 0)
179 LDRB r11,[r12,#17] @pu1_src_cpy[17]
184 VMOV.8 D14[1],r11 @pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[17], pu1_cur_row_tmp, 1
[all...] |
| ihevc_sao_edge_offset_class2.s | 101 MLA r11,r10,r1,r0 @pu1_src[(ht - 1) * src_strd + col]
105 VLD1.8 D0,[r11]! @pu1_src[(ht - 1) * src_strd + col]
116 LDRB r11,[r4] @pu1_src_top_left[0]
119 SUBS r12,r9,r11 @pu1_src[0] - pu1_src_top_left[0]
128 SUBS r11,r9,r4 @pu1_src[0] - pu1_src[1 + src_strd]
130 MVNLT r11,#0
131 MOVGT r11,#1 @SIGN(pu1_src[0] - pu1_src[1 + src_strd])
132 ADD r4,r12,r11 @SIGN(pu1_src[0] - pu1_src_top_left[0]) + SIGN(pu1_src[0] - pu1_src[1 + src_strd])
146 SUB r11,r8,#1 @ht - 1
147 MLA r12,r11,r1,r10 @wd - 1 + (ht - 1) * src_str
[all...] |
| ihevc_padding.s | 100 stmfd sp!, {r4-r11,lr} @stack stores the values of the arguments
112 ldrb r11,[r0]
118 vdup.u8 q3,r11
156 ldmfd sp!,{r4-r11,pc} @reload the registers from sp
219 stmfd sp!, {r4-r11, lr} @stack stores the values of the arguments
231 ldrh r11,[r0]
237 vdup.u16 q3,r11
275 ldmfd sp!,{r4-r11,pc} @reload the registers from sp
348 stmfd sp!, {r4-r11, lr} @stack stores the values of the arguments
360 ldrb r11,[r0, #-1
[all...] |
| ihevc_weighted_pred_bi_default.s | 179 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer)
184 vld1.s16 {d8},[r11],r3 @load and increment the pi2_src1 ii iteration
191 vld1.s16 {d22},[r11],r3 @load and increment the pi2_src1 iii iteration
195 vld1.s16 {d24},[r11],r3 @load and increment the pi2_src1 iv iteration
229 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer)
234 vld1.s16 {d8},[r11],r3 @load and increment the pi2_src1 ii iteration
267 add r11,r0,r3 @pi2_src_tmp1 = pi2_src1 + 2*src_strd1(2* because pi1_src is a 16 bit pointer)
275 vld1.s16 {q14},[r11],r3 @load and increment the pi2_src1 ii iteration
278 vld1.s16 {q8},[r11],r3 @load and increment the pi2_src1 iii iteration
283 vld1.s16 {q6},[r11],r3 @load and increment the pi2_src1 iv iteratio
[all...] |
| /external/libvpx/libvpx/vpx_dsp/arm/ |
| sad_media.asm | 42 ldr r11, [r0, #0xC] ; load 4 src pixels (1B)
57 usada8 r8, r11, lr, r8 ; calculate sad for 4 pixels
67 ldr r11, [r0, #0xC] ; load 4 src pixels (2B)
79 usada8 r8, r11, lr, r8 ; calculate sad for 4 pixels
|
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.td | 37 def R11 : Ri<11, "r11">, DwarfRegNum<[11]>;
51 R11)>;
57 R11, CP, DP, SP, LR)> {
|
| /external/llvm/test/CodeGen/ARM/ |
| 2010-03-18-ldm-rtrn.ll | 9 ; CHECK: pop {r11, pc}
|
| none-macho.ll | 46 ; Frame pointer is r11.
47 ; CHECK: mov r11, sp
61 ; CHECK-NON-FAST: push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
63 ; CHECK-NON-FAST: pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
|
| /external/llvm/test/CodeGen/ARM/Windows/ |
| frame-register.ll | 21 ; CHECK: push.w {r11, lr}
|
| no-frame-register.ll | 21 ; CHECK: push.w {r11, lr}
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ppc32-nest.ll | 6 ; passed in the right register (r11 for PPC).
|
| /external/llvm/test/CodeGen/X86/ |
| stack-folding-adx-x86_64.ll | 14 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
23 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
32 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
41 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
| stack-folding-x86_64.ll | 17 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
26 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
38 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
47 %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
|
