| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mt/ |
| misc.d | 16 18: 00 bc a0 00 add R10,R11,R12
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/nios2/ |
| registers.s | 19 movi r11, 123
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/v850/ |
| v850e1.s | 18 divu r10, r11, r12
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-cris/ |
| v32-ba-1.d | 20 10: 4db2 moveq 13,r11
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-powerpc/ |
| vle-multiseg-6a.s | 4 e_stw r11, 0x48(r1)
|
| /external/libvpx/libvpx/vp8/encoder/arm/armv6/ |
| vp8_short_fdct4x4_armv6.asm | 29 ldr r11, c14500
46 smlad r6, r7, r12, r11 ; o1 = (c1 * 2217 + d1 * 5352 + 14500)
71 smlad r6, r7, r12, r11 ; o5 = (c1 * 2217 + d1 * 5352 + 14500)
96 smlad r6, r7, r12, r11 ; o9 = (c1 * 2217 + d1 * 5352 + 14500)
119 smlad r6, r7, r12, r11 ; o13 = (c1 * 2217 + d1 * 5352 + 14500)
129 ldr r11, c12000
140 add r0, r11, #0x10000 ; add (d!=0)
166 addeq r8, r8, r11 ; c1_b*2217+d1_b*5352+12000 + (d==0)
169 addeq r9, r9, r11 ; c1_t*2217+d1_t*5352+12000 + (d==0)
220 addeq r8, r8, r11 ; c1_b*2217+d1_b*5352+12000 + (d==0
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/ |
| vp8_short_fdct4x4_armv6.asm | 29 ldr r11, c14500
46 smlad r6, r7, r12, r11 ; o1 = (c1 * 2217 + d1 * 5352 + 14500)
71 smlad r6, r7, r12, r11 ; o5 = (c1 * 2217 + d1 * 5352 + 14500)
96 smlad r6, r7, r12, r11 ; o9 = (c1 * 2217 + d1 * 5352 + 14500)
119 smlad r6, r7, r12, r11 ; o13 = (c1 * 2217 + d1 * 5352 + 14500)
129 ldr r11, c12000
140 add r0, r11, #0x10000 ; add (d!=0)
166 addeq r8, r8, r11 ; c1_b*2217+d1_b*5352+12000 + (d==0)
169 addeq r9, r9, r11 ; c1_t*2217+d1_t*5352+12000 + (d==0)
220 addeq r8, r8, r11 ; c1_b*2217+d1_b*5352+12000 + (d==0
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/ |
| operand_test.go | 139 {"R11", "R11"},
249 {"(R11)", "(R11)"},
262 {"R11", "R11"},
281 {"[R1-R12]", "[R1,R2,R3,R4,R5,R6,R7,R8,R9,g,R11,R12]"},
346 {"R11", "R11"},
424 {"R11", "R11"}
[all...] |
| /prebuilts/go/linux-x86/src/cmd/asm/internal/asm/ |
| operand_test.go | 139 {"R11", "R11"},
249 {"(R11)", "(R11)"},
262 {"R11", "R11"},
281 {"[R1-R12]", "[R1,R2,R3,R4,R5,R6,R7,R8,R9,g,R11,R12]"},
346 {"R11", "R11"},
424 {"R11", "R11"}
[all...] |
| /external/compiler-rt/lib/tsan/rtl/ |
| tsan_rtl_amd64.S | 37 push %r11
39 CFI_REL_OFFSET(%r11, 0)
57 pop %r11
84 CFI_RESTORE(%r11)
117 push %r11
119 CFI_REL_OFFSET(%r11, 0)
137 pop %r11
164 CFI_RESTORE(%r11)
|
| /external/libhevc/common/arm/ |
| ihevc_inter_pred_luma_copy_w16out.s | 94 sub r11,r12,#4
127 sub r0,r5,r11
128 sub r1,r10,r11,lsl #1
136 @sub r11,r12,#8
138 rsb r11,r12,r3, lsl #2 @ r11 = (dst_strd * 4) - width
169 addle r1,r1,r11,lsl #1
213 addle r1,r1,r11,lsl #1
|
| /external/llvm/test/CodeGen/ARM/ |
| frame-register.ll | 30 ; CHECK-ARM: push {r11, lr}
31 ; CHECK-ARM: mov r11, sp
|
| /external/llvm/test/CodeGen/X86/ |
| patchpoint-verifiable.mir | 38 ; CHECK: PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
39 PATCHPOINT 5, 5, 0, 2, 0, %rdi, %rsi, csr_64, implicit-def dead early-clobber %r11, implicit-def %rsp, implicit-def dead %rax
|
| sibcall-win64.ll | 56 ; CHECK: jmpq *%{{rax|rcx|rdx|r8|r9|r11}} # TAILCALL
66 ; CHECK: jmpq *%{{rax|rcx|rdx|rsi|rdi|r8|r9|r11}} # TAILCALL
|
| /external/llvm/test/MC/ARM/ |
| thumb2-cbn-to-next-inst.s | 17 add r10, r11, r12
30 @ CHECK: 16: 0b eb 0c 0a add.w r10, r11, r12
|
| /external/llvm/test/Transforms/InstCombine/ |
| fold-vector-zero.ll | 18 %r11 = insertelement <2 x i64> %r9, i64 -9223372036854775808, i32 1
20 %r13 = and <2 x i64> %r7, %r11
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Filt_6k_7k_opt.s | 60 LDRSH r11, [r7], #2
62 MOV r11, r11, ASR #2
66 STRH r11, [r6], #2
72 LDRSH r11, [r7], #2
74 MOV r11, r11, ASR #2
78 STRH r11, [r6], #2
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| quick-s6.d | 15 [ ]+a:[ ]+@IR+40b2@[ ]+@OC@[ ]+0,\$?r11
16 [ ]+c:[ ]+@IR+4ab2@[ ]+@OC@[ ]+10,\$?r11
|
| rd-spr-1.d | 25 1c: 7bff move s15,r11
41 38: 7bab move r11,s10
|
| rd-v32-l4.d | 12 2: 71b9 lapcq 4 <x>,r11
47 30: 7fbd 0600 0000 lapc 36 <x1>,r11
|
| regprefix-err-1.s | 14 move.d r8,[$r11] ; { dg-error "(Illegal|Invalid) operands" }
15 move.d $r8,[$r11+]
|
| scc.d | 15 [ ]+e:[ ]+3b55[ ]+svs[ ]+\$?r11
25 [ ]+22:[ ]+3bf5[ ]+swf[ ]+\$?r11
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/crx/ |
| jscond_insn.d | 40 14: ab ba jlo r11
85 32: ab bb slo r11
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/ |
| iarith.d | 13 c: 00 48 4b 81 addu %r9,%r10,%r11
24 38: 00 48 4b 91 adds %r9,%r10,%r11
35 64: 00 48 4b 89 subu %r9,%r10,%r11
46 90: 00 48 4b 99 subs %r9,%r10,%r11
57 bc: ff 7f 4b 85 addu 32767,%r10,%r11
68 e8: ff 7f 4b 95 adds 32767,%r10,%r11
79 114: ff 7f 4b 8d subu 32767,%r10,%r11
90 140: ff 7f 4b 9d subs 32767,%r10,%r11
|
| ldst01.s | 15 ld.l -1024(%r11),%r21
31 ld.l %r16(%r11),%r21
|
