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  /external/tremolo/Tremolo/
mdctARM.s 188 STMFD r13!,{r4,r6-r11,r14}
198 LDR r11,[r9],#4 @ r11= *wL++
203 SMULL r14,r11,r12,r11 @ (r14,r11) = *l * *wL++
205 ADD r6, r6, r11
216 LDMFD r13!,{r4,r6-r11,PC}
227 STMFD r13!,{r4,r6-r11,r14}
237 LDR r11,[r9],#4 @ r11= *wL+
    [all...]
mdctLARM.s 186 STMFD r13!,{r4,r6-r11,r14}
198 LDRB r11,[r9],#1 @ r11= *wL++
202 MUL r11,r12,r11 @ r11 = *l * *wL++
204 MLA r6, r7, r6, r11 @ r6 = *--r * *--wR
215 LDMFD r13!,{r4,r6-r11,PC}
226 STMFD r13!,{r4,r6-r11,r14}
237 LDRB r11,[r9],#1 @ r11= *wL+
    [all...]
  /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/testdata/
amd64.out 2 12 00002 (testdata/amd64.s:12) NEGQ R11
3 13 00003 (testdata/amd64.s:13) NEGQ 4(R11)
6 18 00006 (testdata/amd64.s:18) DIVB R11
7 19 00007 (testdata/amd64.s:19) DIVB 4(R11)
10 24 00010 (testdata/amd64.s:24) SUBQ R11, DI
11 25 00011 (testdata/amd64.s:25) SUBQ 4(R11), DI
14 28 00014 (testdata/amd64.s:28) SUBQ R11, 8(R12)
15 29 00015 (testdata/amd64.s:29) SUBQ R11, foo+4(SB)
23 44 00023 (testdata/amd64.s:44) JMP bar<>+4(SB)(R11*4)
40 69 00040 (testdata/amd64.s:69) SHLL R11, R1
    [all...]
  /prebuilts/go/linux-x86/src/cmd/asm/internal/asm/testdata/
amd64.out 2 12 00002 (testdata/amd64.s:12) NEGQ R11
3 13 00003 (testdata/amd64.s:13) NEGQ 4(R11)
6 18 00006 (testdata/amd64.s:18) DIVB R11
7 19 00007 (testdata/amd64.s:19) DIVB 4(R11)
10 24 00010 (testdata/amd64.s:24) SUBQ R11, DI
11 25 00011 (testdata/amd64.s:25) SUBQ 4(R11), DI
14 28 00014 (testdata/amd64.s:28) SUBQ R11, 8(R12)
15 29 00015 (testdata/amd64.s:29) SUBQ R11, foo+4(SB)
23 44 00023 (testdata/amd64.s:44) JMP bar<>+4(SB)(R11*4)
40 69 00040 (testdata/amd64.s:69) SHLL R11, R1
    [all...]
  /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/
R4R8First_v5.s 28 stmdb sp!, {r4 - r11, lr}
31 mov r11, r0
35 ldrd r0, [r11]
36 ldrd r2, [r11, #8]
37 ldrd r4, [r11, #16]
38 ldrd r6, [r11, #24]
64 strd r6, [r11]
65 strd r2, [r11, #8]
66 strd r8, [r11, #16]
67 strd r0, [r11, #24
    [all...]
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/
armVCM4P10_DecodeCoeffsToPair_s.S 55 LDRB r11,[r10],#3
59 ORR r11,r9,r11,LSL #16
60 LSLS r8,r11,r12
71 ORRCS r11,r8,r11,LSL #8
74 LSLS r8,r11,r12
95 LSLS r7,r11,r12
102 ORRCS r11,r8,r11,LSL #
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vpx_scale/arm/neon/
vp8_vpxyv12_copysrcframe_func_neon.asm 28 push {r4 - r11, lr}
40 add r11, r3, r7 ;second row dst
64 vst1.8 {q4, q5}, [r11]!
66 vst1.8 {q6, q7}, [r11]!
68 vst1.8 {q12, q13}, [r11]!
70 vst1.8 {q14, q15}, [r11]!
82 vst1.8 {d1}, [r11]!
93 strb r8, [r11], #1
101 add r11, r11, r
    [all...]
  /frameworks/av/media/libstagefright/codecs/mp3dec/src/asm/
pvmp3_polyphase_filter_window_gcc.s 47 stmfd sp!,{r0-r2,r4-r11,lr}
59 @ Accumulators r9, r11::> Initialization
63 mov r11, #0x20
74 smlal r2,r11,lr,r6
77 smlal r5,r11,r2,r5
86 sub r11,r11,r2
88 smlal r7,r11,r5,r7
93 smlal lr,r11,r2,r6
96 smlal r5,r11,r2,r
    [all...]
  /external/llvm/test/FileCheck/
check-dag-xfails.txt 10 add r11, r3, r4
21 mul r11, r3, r4
23 add r5, r11, r11
33 add r11, r3, r4
35 mul r5, r10, r11
45 add r11, r3, r4
48 mul r5, r12, r11
59 mul r5, r12, r11
60 add r11, r3, r
    [all...]
  /external/llvm/test/MC/ARM/
eh-directive-movsp-diagnostics.s 22 .setfp r11, sp, #8
23 add r11, sp, #8
25 mov r7, r11
66 .movsp r11,
67 mov sp, r11
71 @ CHECK: .movsp r11,
80 .movsp r11, #constant
81 mov sp, r11
85 @ CHECK: .movsp r11, #constant
  /prebuilts/go/darwin-x86/src/runtime/
sys_solaris_amd64.s 78 MOVQ libcall_args(DI), R11
90 CMPQ R11, $0
93 MOVQ 0(R11), DI
94 MOVQ 8(R11), SI
95 MOVQ 16(R11), DX
96 MOVQ 24(R11), CX
97 MOVQ 32(R11), R8
98 MOVQ 40(R11), R9
186 LEAQ m_libcall(BP), R11
187 MOVQ libcall_fn(R11), R1
    [all...]
  /prebuilts/go/linux-x86/src/runtime/
sys_solaris_amd64.s 78 MOVQ libcall_args(DI), R11
90 CMPQ R11, $0
93 MOVQ 0(R11), DI
94 MOVQ 8(R11), SI
95 MOVQ 16(R11), DX
96 MOVQ 24(R11), CX
97 MOVQ 32(R11), R8
98 MOVQ 40(R11), R9
186 LEAQ m_libcall(BP), R11
187 MOVQ libcall_fn(R11), R1
    [all...]
  /external/libvpx/libvpx/vp8/common/arm/armv6/
dequant_idct_v6.asm 21 stmdb sp!, {r4-r11, lr}
70 smulwt r11, r3, r12
77 pkhbt r9, r9, r11, lsl #16
78 ldr r11, [r0], #4
83 uadd16 r10, r11, r14
84 usub16 r8, r11, r14
107 pkhbt r11, r8, r6, lsl #16
113 uadd16 r10, r11, lr
114 usub16 lr, r11, lr
119 smulwt r11, r4, r
    [all...]
  /external/llvm/test/CodeGen/SystemZ/
frame-11.ll 8 ; we should use a frame pointer and tear down the frame based on %r11
12 ; CHECK: stmg %r11, %r15, 88(%r15)
14 ; CHECK: lgr %r11, %r15
16 ; CHECK: lmg %r11, %r15, 248(%r11)
  /external/valgrind/none/tests/amd64/
bug127521-64.c 27 "movq %0,%%r11\n"
28 "\tmovq 0(%%r11),%%rdx\n"
29 "\tmovq 8(%%r11),%%rax\n"
30 "\tmovq 16(%%r11),%%rcx\n"
31 "\tmovq 24(%%r11),%%rbx\n"
32 "\tmovq 32(%%r11),%%r10\n"
36 "\tmovq %%r10,40(%%r11)\n"
37 "\tmovq %%rdx,0(%%r11)\n"
38 "\tmovq %%rax,8(%%r11)\n"
41 : /*trash*/ "%r11", "%r10", "%rax", "%rbx", "%rcx", "%rdx",
    [all...]
shrld.c 35 "\tpushq %r11\n"
38 "\tmovq xtra, %r11\n"
42 "\tshldq %cl, %r11, %rsi\n"
47 "\tpopq %r11\n"
56 "\tpushq %r11\n"
59 "\tmovq xtra, %r11\n"
68 "\tpopq %r11\n"
77 "\tpushq %r11\n"
80 "\tmovq xtra, %r11\n"
89 "\tpopq %r11\n
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/
dequant_idct_v6.asm 21 stmdb sp!, {r4-r11, lr}
70 smulwt r11, r3, r12
77 pkhbt r9, r9, r11, lsl #16
78 ldr r11, [r0], #4
83 uadd16 r10, r11, r14
84 usub16 r8, r11, r14
107 pkhbt r11, r8, r6, lsl #16
113 uadd16 r10, r11, lr
114 usub16 lr, r11, lr
119 smulwt r11, r4, r
    [all...]
vp8_variance16x16_armv6.asm 33 mov r11, #0 ; initialize sse = 0
61 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
66 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
85 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
90 smlad r11, r10, r10, r11 ; dual signed multiply, add and accumulate (2)
109 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1
    [all...]
vp8_variance_halfpixvar16x16_h_armv6.asm 34 mov r11, #0 ; initialize sse = 0
66 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
78 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
97 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
109 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
128 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1
    [all...]
vp8_variance_halfpixvar16x16_v_armv6.asm 34 mov r11, #0 ; initialize sse = 0
67 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
79 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
98 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
110 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
129 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/
a2.d 91 fc: (7d 6a 61 f8|f8 61 6a 7d) bpermd r10,r11,r12
93 104: (7d 6a 63 f8|f8 63 6a 7d) cmpb r10,r11,r12
110 148: (7c 0a 5d ec|ec 5d 0a 7c) dcba r10,r11
111 14c: (7c 0a 58 ac|ac 58 0a 7c) dcbf r10,r11
112 150: (7c 2a 58 ac|ac 58 2a 7c) dcbfl r10,r11
113 154: (7c 0a 58 fe|fe 58 0a 7c) dcbfep r10,r11
114 158: (7c 0a 5b ac|ac 5b 0a 7c) dcbi r10,r11
115 15c: (7c 0a 5b 0c|0c 5b 0a 7c) dcblc r10,r11
116 160: (7c 2a 5b 0c|0c 5b 2a 7c) dcblc 1,r10,r11
117 164: (7c 0a 58 6c|6c 58 0a 7c) dcbst r10,r11
    [all...]
  /external/boringssl/src/ssl/test/runner/poly1305/
poly1305_arm.s 17 // Warning: the linker may use R11 to synthesize certain instructions. Please
21 MOVM.DB.W [R4-R11], (R13)
27 MOVW R4>>14, R11
31 ORR R5<<18, R11, R11
36 AND R11, R5, R5
47 MOVM.IA.W (R13), [R4-R11]
61 MOVM.DB.W [R4, R5, R6, R7, R8, R9, g, R11, R14], (R13)
93 MOVW R1>>20, R11
98 ORR R2<<12, R11, R1
    [all...]
  /external/libvpx/libvpx/vpx_dsp/arm/
variance_halfpixvar16x16_h_media.asm 34 mov r11, #0 ; initialize sse = 0
66 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
78 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
97 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
109 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
128 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1
    [all...]
variance_halfpixvar16x16_v_media.asm 34 mov r11, #0 ; initialize sse = 0
67 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
79 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
98 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1)
110 smlad r11, r7, r7, r11 ; dual signed multiply, add and accumulate (2)
129 smlad r11, r5, r5, r11 ; dual signed multiply, add and accumulate (1
    [all...]
  /external/llvm/test/CodeGen/ARM/
2014-02-21-byval-reg-split-alignment.ll 17 ; CHECK: push {r11, lr}
24 ; CHECK: pop {r11, lr}
36 ; CHECK: push {r11, lr}
41 ; CHECK: pop {r11, lr}
53 ; CHECK: push {r11, lr}
58 ; CHECK: pop {r11, lr}
70 ; CHECK: push {r11, lr}
76 ; CHECK: pop {r11, lr}
90 ; CHECK: push {r11, lr}
95 ; CHECK: pop {r11, lr
    [all...]

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1 2 34 5 6 7 8 91011>>