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  /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/
plan9x.go 207 R11B: "R11",
223 R11W: "R11",
239 R11L: "R11",
255 R11: "R11",
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic4x/
addressing.s 148 addf3 R11,R0,R0
175 addf3 R0,R11,R0
284 fix R11,R0
285 absf R11,R0
302 ldf R0,R11
  /external/libhevc/common/arm/
ihevc_intra_pred_filters_chroma_mode_11_to_17.s 220 ldrh r11, [r1], #-2
221 strh r11, [r6], #2
244 ldrh r11, [r1, r0]
245 strh r11, [r6], #-2
261 mov r11, r4, lsl #1 @col counter to be inc/dec by #8
407 subs r11, r11, #8
413 movle r11, r4, lsl #1
445 subs r11, r11, #
    [all...]
  /external/valgrind/docs/internals/
register-uses.txt 48 r11 n jmp temporary
75 r11 n y
122 r11 y avail
194 r11 y see below avail
211 r10, r11 as well as f12-f15 are used as real regs during insn
231 r11 n "env pointer?!" y
268 r11 n Next Guest State
  /external/zlib/src/contrib/masmx64/
gvmat64.asm 66 ; register used : rax,rbx,rcx,rdx,rsi,rdi,r8,r9,r10,r11,r12
73 ;windowbestlen equ rsp + xx - LocalVarsSize ; s->window + bestlen , use r10+r11
104 ; bestlen r11
199 ; rax, rcx, rdx, r8, r9, r10, and r11, which are scratch.
302 lea rsi,[r10+r11]
309 movzx ebx, word ptr [r9 + r11 - 1]
486 lea rsi,[r10+r11]
  /external/elfutils/tests/
testfile45.expect.bz2 
  /prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/link/internal/ppc64/
asm.go 560 // This stub is PIC, so first get the PC of label 1 into r11.
564 ld.Adduint32(ld.Ctxt, glink, 0x7d6802a6) // 1: mflr r11
569 // r11):
570 // r0 = ((r12 - r11) - (res_0 - r11)) / 4 = (r12 - res_0) / 4
573 ld.Adduint32(ld.Ctxt, glink, 0x7c0b0050) // sub r0,r0,r11
576 // r11 = address of the first byte of the PLT
584 // addis r11,0,.plt@ha; addi r11,r11,.plt@
    [all...]
  /prebuilts/go/darwin-x86/src/cmd/link/internal/ppc64/
asm.go 557 // This stub is PIC, so first get the PC of label 1 into r11.
561 ld.Adduint32(ld.Ctxt, glink, 0x7d6802a6) // 1: mflr r11
566 // r11):
567 // r0 = ((r12 - r11) - (res_0 - r11)) / 4 = (r12 - res_0) / 4
570 ld.Adduint32(ld.Ctxt, glink, 0x7c0b0050) // sub r0,r0,r11
573 // r11 = address of the first byte of the PLT
581 // addis r11,0,.plt@ha; addi r11,r11,.plt@
    [all...]
  /prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/link/internal/ppc64/
asm.go 560 // This stub is PIC, so first get the PC of label 1 into r11.
564 ld.Adduint32(ld.Ctxt, glink, 0x7d6802a6) // 1: mflr r11
569 // r11):
570 // r0 = ((r12 - r11) - (res_0 - r11)) / 4 = (r12 - res_0) / 4
573 ld.Adduint32(ld.Ctxt, glink, 0x7c0b0050) // sub r0,r0,r11
576 // r11 = address of the first byte of the PLT
584 // addis r11,0,.plt@ha; addi r11,r11,.plt@
    [all...]
  /prebuilts/go/linux-x86/src/cmd/link/internal/ppc64/
asm.go 557 // This stub is PIC, so first get the PC of label 1 into r11.
561 ld.Adduint32(ld.Ctxt, glink, 0x7d6802a6) // 1: mflr r11
566 // r11):
567 // r0 = ((r12 - r11) - (res_0 - r11)) / 4 = (r12 - res_0) / 4
570 ld.Adduint32(ld.Ctxt, glink, 0x7c0b0050) // sub r0,r0,r11
573 // r11 = address of the first byte of the PLT
581 // addis r11,0,.plt@ha; addi r11,r11,.plt@
    [all...]
  /art/runtime/arch/x86_64/
quick_entrypoints_x86_64.S 393 * r11 == arg_array. Clobbers r10, r11 and al. Branches to xmm_setup_finished if it encounters
406 addq MACRO_LITERAL(4), %r11 // arg_array++
410 addq MACRO_LITERAL(4), %r11 // arg_array++
413 movsd (%r11), REG_VAR(xmm_reg)
414 addq MACRO_LITERAL(8), %r11 // arg_array+=2
417 movss (%r11), REG_VAR(xmm_reg)
418 addq MACRO_LITERAL(4), %r11 // arg_array++
424 * r11 == arg_array. Clobbers r10, r11 and al. Branches to gpr_setup_finished if it encounter
    [all...]
  /external/valgrind/VEX/priv/
host_s390_isel.c 951 HReg r10, r11, h1; local
957 /* We use non-virtual registers r10 and r11 as pair */
959 r11 = make_gpr(11);
961 /* Move 1st operand into r11 and */
962 addInstr(env, s390_insn_move(8, r11, h1));
965 addInstr(env, s390_insn_divs(8, r10, r11, op2));
967 /* The result is in registers r10 (remainder) and r11 (quotient).
974 addInstr(env, s390_insn_move(8, *dst_lo, r11));
982 HReg r10, r11, h1; local
990 /* We use non-virtual registers r10 and r11 as pair *
1010 HReg r10, r11, hi, lo; local
1139 HReg r10, r11; local
1179 HReg r10, r11; local
1777 HReg r10, r11; local
3874 HReg r8, r9, r10, r11, r1; local
    [all...]
  /external/libavc/common/arm/
ih264_weighted_bi_pred_a9q.s 126 @ [sp+28] => ht (r11)
148 ldr r11, [sp, #68] @Load ht in r11
189 subs r11, r11, #4 @decrement ht by 4
255 subs r11, r11, #4 @decrement ht by 4
344 subs r11, r11, #4 @decrement ht by 4
441 @ [sp+28] => ht (r11)
    [all...]
  /external/boringssl/linux-x86_64/crypto/aes/
bsaes-x86_64.S 12 leaq .LBS0(%rip),%r11
16 movdqa 80(%r11),%xmm7
34 movdqa 0(%r11),%xmm7
35 movdqa 16(%r11),%xmm8
64 movdqa 32(%r11),%xmm7
376 movdqa 48(%r11),%xmm7
378 movdqa 64(%r11),%xmm7
382 movdqa 0(%r11),%xmm7
383 movdqa 16(%r11),%xmm8
412 movdqa 32(%r11),%xmm
    [all...]
  /external/boringssl/mac-x86_64/crypto/aes/
bsaes-x86_64.S 10 leaq L$BS0(%rip),%r11
14 movdqa 80(%r11),%xmm7
32 movdqa 0(%r11),%xmm7
33 movdqa 16(%r11),%xmm8
62 movdqa 32(%r11),%xmm7
374 movdqa 48(%r11),%xmm7
376 movdqa 64(%r11),%xmm7
380 movdqa 0(%r11),%xmm7
381 movdqa 16(%r11),%xmm8
410 movdqa 32(%r11),%xmm
    [all...]
  /external/boringssl/win-x86_64/crypto/sha/
sha1-x86_64.asm 95 lea r11d,[1518500249+r11*1+r14]
160 lea r11d,[1518500249+r11*1+rbp]
225 lea r11d,[1518500249+r11*1+rdx]
295 lea r11d,[1518500249+r11*1+r14]
367 lea r11d,[1859775393+r11*1+rbp]
437 lea r11d,[1859775393+r11*1+rdx]
507 lea r11d,[1859775393+r11*1+r14]
577 lea r11d,[1859775393+r11*1+rbp]
653 lea r11d,[((-1894007588))+r11*1+rdx]
738 lea r11d,[((-1894007588))+r11*1+r14
    [all...]
  /frameworks/av/services/audioflinger/
AudioResampler.cpp 569 "stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}\n"
581 " ldr r11, [sp, #" MO_PARAM5 " + 16]\n" // vr
598 // r11 vr
624 " mla r4, r0, r11, r4\n" /* vr*interp + out[] */\
647 " ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}\n"
689 "stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, lr}\n"
701 " ldr r11, [sp, #" ST_PARAM5 " + 16]\n" // vr
718 // r11 vr
750 " mla r4, r12, r11, r4\n" /* vr*interp + out[] */\
775 " ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, r12, pc}\n
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
x86-64-tbm-intel.d 38 [ ]*[a-f0-9]+: 8f 0a f8 10 ac 2b 68 db 00 00 39 40 cb 70[ ]+bextr r13,QWORD PTR \[r11\+r13\*1\+0xdb68\],0x70cb4039
42 [ ]*[a-f0-9]+: 8f 6a f8 10 1f ef ee ee 7b[ ]+bextr r11,QWORD PTR \[rdi\],0x7beeeeef
48 [ ]*[a-f0-9]+: 8f c9 30 01 0b[ ]+blcfill r9d,DWORD PTR \[r11\]
60 [ ]*[a-f0-9]+: 8f c9 a0 01 cd[ ]+blcfill r11,r13
74 [ ]*[a-f0-9]+: 8f c9 f0 01 cb[ ]+blcfill rcx,r11
91 [ ]*[a-f0-9]+: 67 8f e9 a0 02 33[ ]+blci r11,QWORD PTR \[ebx\]
114 [ ]*[a-f0-9]+: 8f c9 40 01 2b[ ]+blcic edi,DWORD PTR \[r11\]
118 [ ]*[a-f0-9]+: 8f a9 00 01 2c 1d a7 d0 1a 14[ ]+blcic r15d,DWORD PTR \[r11\*1\+0x141ad0a7\]
134 [ ]*[a-f0-9]+: 67 8f e9 a0 01 2b[ ]+blcic r11,QWORD PTR \[ebx\]
164 [ ]*[a-f0-9]+: 8f c9 88 02 0b[ ]+blcmsk r14,QWORD PTR \[r11\]
    [all...]
x86-64-tbm.d 36 [ ]*[a-f0-9]+: 8f 0a f8 10 ac 2b 68 db 00 00 39 40 cb 70 bextr \$0x70cb4039,0xdb68\(%r11,%r13,1\),%r13
40 [ ]*[a-f0-9]+: 8f 6a f8 10 1f ef ee ee 7b bextr \$0x7beeeeef,\(%rdi\),%r11
46 [ ]*[a-f0-9]+: 8f c9 30 01 0b blcfill \(%r11\),%r9d
58 [ ]*[a-f0-9]+: 8f c9 a0 01 cd blcfill %r13,%r11
72 [ ]*[a-f0-9]+: 8f c9 f0 01 cb blcfill %r11,%rcx
89 [ ]*[a-f0-9]+: 67 8f e9 a0 02 33 blci \(%ebx\),%r11
112 [ ]*[a-f0-9]+: 8f c9 40 01 2b blcic \(%r11\),%edi
116 [ ]*[a-f0-9]+: 8f a9 00 01 2c 1d a7 d0 1a 14 blcic 0x141ad0a7\(,%r11,1\),%r15d
132 [ ]*[a-f0-9]+: 67 8f e9 a0 01 2b blcic \(%ebx\),%r11
162 [ ]*[a-f0-9]+: 8f c9 88 02 0b blcmsk \(%r11\),%r1
    [all...]
  /external/libavc/encoder/arm/
ih264e_fmt_conv.s 263 ldr r11, [sp, #44] @// Load u4_height from stack
269 mov r11, r11, asr #1 @// u4_width = u4_width / 2 (u4_width >> 1)
286 @// u4_height / 2 - r11
338 subs r11, r11, #1
  /external/libvpx/libvpx/vpx_dsp/mips/
idct16x16_msa.c 294 v8i16 r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15; local
309 r8, r9, r10, r11, r12, r13, r14, r15);
319 TRANSPOSE8x8_SH_SH(r3, r11, r15, r7, r5, l13, r9, l15,
327 v8i16 r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15; local
343 r11 = LD_SH(input + 11 * 16);
357 MADD_BF(r11, r4, r3, r12, k0, k1, k2, k3, g8, g9, g10, g11);
  /external/llvm/test/CodeGen/PowerPC/
ec-input.ll 44 %2 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 %indvars.iv, i64 %0, i64 undef) #2
66 %5 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1033, i64 0, i64 %0, i64 undef) #2
77 %7 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 0, i64 %0, i64 undef) #2
99 %11 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 undef, i64 %0, i64 undef) #2
105 %13 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1035, i64 undef, i64 %0, i64 0) #2
129 %17 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1035, i64 0, i64 %0, i64 0) #2
  /external/llvm/test/MC/Hexagon/
v60-vmem.s 75 #CHECK: 29abc5fe { if (!p0) vmemu(r11++#-3) = v30 }
77 if (!p0) vmemu(r11++#-3)=v30
99 #CHECK: 284be316 { v22 = vmem(r11+#-5):nt }
101 v22=vmem(r11+#-5):nt
150 #CHECK: 2bebd813 { if (p3) vmem(r11++m0):nt = v19 }
152 if (p3) vmem(r11++m0):nt=v19
  /external/valgrind/coregrind/m_syswrap/
syscall-amd64-solaris.S 132 movq 16(%rax), %r11
133 pushq %r11
134 movq 8(%rax), %r11
135 pushq %r11
137 movq 0(%rax), %r11
138 pushq %r11
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/
dv-raw-err.s 104 mov r11 = ar.rnat
148 mov cr.ifs = r11
368 cmp.eq p7, p8 = r11, r12
436 mov r11 = cr.eoi // any mov-to/from-cr is a DV
593 (p23) add r9 = r10, r11
598 cmp.eq p27, p28 = r11, r12

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