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  /external/llvm/test/CodeGen/SystemZ/
xor-07.ll 9 ; CHECK: br %r14
18 ; CHECK: br %r14
27 ; CHECK: br %r14
36 ; CHECK: br %r14
int-add-14.ll 10 ; CHECK: br %r14
19 ; CHECK: br %r14
28 ; CHECK: br %r14
37 ; CHECK: br %r14
46 ; CHECK: br %r14
55 ; CHECK: br %r14
64 ; CHECK: br %r14
int-add-15.ll 10 ; CHECK: br %r14
19 ; CHECK: br %r14
28 ; CHECK: br %r14
37 ; CHECK: br %r14
46 ; CHECK: br %r14
55 ; CHECK: br %r14
64 ; CHECK: br %r14
or-02.ll 9 ; CHECK: br %r14
18 ; CHECK: br %r14
27 ; CHECK: br %r14
36 ; CHECK: br %r14
45 ; CHECK: br %r14
54 ; CHECK: br %r14
63 ; CHECK: br %r14
vec-const-03.ll 9 ; CHECK: br %r14
17 ; CHECK: br %r14
25 ; CHECK: br %r14
33 ; CHECK: br %r14
41 ; CHECK: br %r14
49 ; CHECK: br %r14
57 ; CHECK: br %r14
vec-const-05.ll 9 ; CHECK: br %r14
17 ; CHECK: br %r14
26 ; CHECK: br %r14
35 ; CHECK: br %r14
44 ; CHECK: br %r14
53 ; CHECK: br %r14
61 ; CHECK: br %r14
xor-04.ll 9 ; CHECK: br %r14
18 ; CHECK: br %r14
27 ; CHECK: br %r14
37 ; CHECK: br %r14
46 ; CHECK: br %r14
56 ; CHECK: br %r14
66 ; CHECK: br %r14
int-add-06.ll 9 ; CHECK: br %r14
18 ; CHECK: br %r14
27 ; CHECK: br %r14
36 ; CHECK: br %r14
45 ; CHECK: br %r14
54 ; CHECK: br %r14
63 ; CHECK: br %r14
72 ; CHECK: br %r14
81 ; CHECK: br %r14
90 ; CHECK: br %r14
    [all...]
int-const-05.ll 9 ; CHECK: br %r14
18 ; CHECK: br %r14
27 ; CHECK: br %r14
36 ; CHECK: br %r14
45 ; CHECK: br %r14
54 ; CHECK: br %r14
63 ; CHECK: br %r14
74 ; CHECK: br %r14
85 ; CHECK: br %r14
96 ; CHECK: br %r14
    [all...]
int-const-06.ll 9 ; CHECK: br %r14
18 ; CHECK: br %r14
27 ; CHECK: br %r14
36 ; CHECK: br %r14
45 ; CHECK: br %r14
54 ; CHECK: br %r14
63 ; CHECK: br %r14
75 ; CHECK: br %r14
86 ; CHECK: br %r14
97 ; CHECK: br %r14
    [all...]
memset-03.ll 12 ; CHECK: br %r14
21 ; CHECK: br %r14
30 ; CHECK: br %r14
39 ; CHECK: br %r14
48 ; CHECK: br %r14
57 ; CHECK: br %r14
67 ; CHECK: br %r14
77 ; CHECK: br %r14
86 ; CHECK: br %r14
95 ; CHECK: br %r14
    [all...]
memset-04.ll 12 ; CHECK: br %r14
21 ; CHECK: br %r14
30 ; CHECK: br %r14
39 ; CHECK: br %r14
48 ; CHECK: br %r14
57 ; CHECK: br %r14
67 ; CHECK: br %r14
77 ; CHECK: br %r14
86 ; CHECK: br %r14
95 ; CHECK: br %r14
    [all...]
vec-const-15.ll 10 ; CHECK: br %r14
18 ; CHECK: br %r14
26 ; CHECK: br %r14
34 ; CHECK: br %r14
42 ; CHECK: br %r14
51 ; CHECK: br %r14
59 ; CHECK: br %r14
67 ; CHECK: br %r14
75 ; CHECK: br %r14
83 ; CHECK: br %r14
    [all...]
vec-const-16.ll 10 ; CHECK: br %r14
18 ; CHECK: br %r14
26 ; CHECK: br %r14
34 ; CHECK: br %r14
42 ; CHECK: br %r14
51 ; CHECK: br %r14
59 ; CHECK: br %r14
67 ; CHECK: br %r14
75 ; CHECK: br %r14
83 ; CHECK: br %r14
    [all...]
vec-const-17.ll 10 ; CHECK: br %r14
19 ; CHECK: br %r14
28 ; CHECK: br %r14
37 ; CHECK: br %r14
46 ; CHECK: br %r14
56 ; CHECK: br %r14
65 ; CHECK: br %r14
74 ; CHECK: br %r14
83 ; CHECK: br %r14
92 ; CHECK: br %r14
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/crx/
list_insn.d 10 0: 6e 34 18 00 push r14, {r3,r4}
26 1c: 6d 32 02 40 popret r13, {r1,r14}
27 20: de ff popret r14
36 2a: 4f 34 00 40 storm r15, {r14}
misc_insn.d 31 1c: 08 30 ef 61 macud r14, r15
34 20: 08 30 ef 62 macqd r14, r15
55 3c: 08 30 ce 30 sextbw r12, r14
61 44: 08 30 ef 32 sextwd r14, r15
73 54: 9e ff getrfid r14
79 58: 08 30 e2 3f bswap r14, r2
85 60: 08 30 fe 81 minsb r15, r14
115 88: 08 30 ee 8b mulqb r14, r14
130 9c: 08 30 fe 91 minsw r15, r14
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
x86-64-avx512pf-intel.d 12 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd ZMMWORD PTR \[r14\+ymm31\*8\+0x7b\]\{k1\}
13 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd ZMMWORD PTR \[r14\+ymm31\*8\+0x7b\]\{k1\}
16 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
17 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
20 [ ]*[a-f0-9]+: 62 92 fd 41 c7 8c fe 7b 00 00 00 vgatherpf0qpd ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
21 [ ]*[a-f0-9]+: 62 92 fd 41 c7 8c fe 7b 00 00 00 vgatherpf0qpd ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
24 [ ]*[a-f0-9]+: 62 92 7d 41 c7 8c fe 7b 00 00 00 vgatherpf0qps YMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
25 [ ]*[a-f0-9]+: 62 92 7d 41 c7 8c fe 7b 00 00 00 vgatherpf0qps YMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
28 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd ZMMWORD PTR \[r14\+ymm31\*8\+0x7b\]\{k1\}
29 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd ZMMWORD PTR \[r14\+ymm31\*8\+0x7b\]\{k1\
    [all...]
x86-64-avx512pf.d 11 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
12 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
15 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
16 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
19 [ ]*[a-f0-9]+: 62 92 fd 41 c7 8c fe 7b 00 00 00 vgatherpf0qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
20 [ ]*[a-f0-9]+: 62 92 fd 41 c7 8c fe 7b 00 00 00 vgatherpf0qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
23 [ ]*[a-f0-9]+: 62 92 7d 41 c7 8c fe 7b 00 00 00 vgatherpf0qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
24 [ ]*[a-f0-9]+: 62 92 7d 41 c7 8c fe 7b 00 00 00 vgatherpf0qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
27 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
28 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd 0x7b\(%r14,%ymm31,8\)\{%k1\
    [all...]
x86-64-xsaves-intel.d 13 [ ]*[a-f0-9]+:[ ]*4a 0f c7 ac f0 23 01 00 00[ ]*xsaves64 \[rax\+r14\*8\+0x123\]
15 [ ]*[a-f0-9]+:[ ]*4a 0f c7 9c f0 23 01 00 00[ ]*xrstors64 \[rax\+r14\*8\+0x123\]
17 [ ]*[a-f0-9]+:[ ]*4a 0f c7 ac f0 34 12 00 00[ ]*xsaves64 \[rax\+r14\*8\+0x1234\]
19 [ ]*[a-f0-9]+:[ ]*4a 0f c7 9c f0 34 12 00 00[ ]*xrstors64 \[rax\+r14\*8\+0x1234\]
x86-64-xsaves.d 13 [ ]*[a-f0-9]+:[ ]*4a 0f c7 ac f0 23 01 00 00[ ]*xsaves64 0x123\(%rax,%r14,8\)
15 [ ]*[a-f0-9]+:[ ]*4a 0f c7 9c f0 23 01 00 00[ ]*xrstors64 0x123\(%rax,%r14,8\)
17 [ ]*[a-f0-9]+:[ ]*4a 0f c7 ac f0 34 12 00 00[ ]*xsaves64 0x1234\(%rax,%r14,8\)
19 [ ]*[a-f0-9]+:[ ]*4a 0f c7 9c f0 34 12 00 00[ ]*xrstors64 0x1234\(%rax,%r14,8\)
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/s390/
zarch-operands.s 4 .insn ril,0xc00500000000,%r14,test_ril
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/
tlspic.d 11 2: 2f e6 [ ]*mov\.l r14,@-r15
12 4: 6e f3 [ ]*mov r15,r14
26 1e: 6f e3 [ ]*mov r14,r15
27 20: 6e f6 [ ]*mov\.l @r15\+,r14
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-crx/
reloc-imm16.d 12 1010: ee 11 14 20 addw \$0x2014, r14
  /external/llvm/test/MC/ARM/
arm-ldrd.s 42 // CHECK: error: Rt can't be R14
43 // CHECK: error: Rt can't be R14
44 // CHECK: error: Rt can't be R14
45 // CHECK: error: Rt can't be R14
46 // CHECK: error: Rt can't be R14
47 // CHECK: error: Rt can't be R14
48 // CHECK: error: Rt can't be R14

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1 2 3 4 56 7 8 91011>>