| /toolchain/binutils/binutils-2.25/bfd/ |
| elf32-moxie.c | 141 routines, but a few relocs, we have to do them ourselves. */
170 The relocs are always passed as Rela structures; if the section
175 necessary, and (if using Rela relocs and generating a relocatable
201 Elf_Internal_Rela *relocs,
212 relend = relocs + input_section->reloc_count;
214 for (rel = relocs; rel < relend; rel ++)
326 /* Look through the relocs for a section during the first phase.
328 virtual table relocs for gc. */
334 const Elf_Internal_Rela *relocs)
347 rel_end = relocs + sec->reloc_count
[all...] |
| nlm32-i386.c | 149 /* NetWare only supports two kinds of relocs. We should check
151 relocs uses a special_function which does not affect what we do
187 /* NetWare only supports absolute internal relocs. */
207 /* PC relative relocs on NetWare must be pcrel_offset. */
224 into a NetWare i386 module. That means that the relocs from the
225 source file have to be mapped into relocs that apply to the target
227 it a chance to rework the relocs.
256 byte relocs here, so we insist on having 4 bytes. */
295 pc_relative relocs accordingly. We are going to change the
332 bfd_size_type rcount; /* Number of relocs. *
[all...] |
| elf32-mcore.c | 33 /* RELA relocs are used here... */
86 /* Don't pretend we can deal with unsupported relocs. */
359 The relocs are always passed as Rela structures; if the section
364 necessary, and (if using Rela relocs and generating a
391 Elf_Internal_Rela * relocs,
397 Elf_Internal_Rela * rel = relocs;
398 Elf_Internal_Rela * relend = relocs + input_section->reloc_count;
577 const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED)
582 /* Look through the relocs for a section during the first phase.
584 virtual table relocs for gc. *
[all...] |
| mep-relocs.pl | 27 # the relocs to be sequential (this is needed so that bfd/elf32-mep.h
56 push(@relocs, $rel);
82 $autogen = " /* This section generated from bfd/mep-relocs.pl from include/elf/mep.h. */\n";
127 for ($i=2; $i<=$#relocs; $i++) {
141 $c = "$relocs[$i],";
148 for ($i=2; $i<=$#relocs; $i++) {
158 print NEW " case R_MEP_$relocs[$i]: /* $pattern[$i] */\n";
234 for $i (2..$#relocs) {
235 printf (NEW "$pattern", $relocs[$i]) || die("$file.new write: $!");
|
| nlm32-sparc.c | 164 /* Netware wants a list of relocs for each address.
192 /* Mangle relocs for SPARC NetWare. We can just use the standard
193 SPARC relocs. */
211 bfd_size_type rcount; /* Number of relocs. */
241 /* Next, start reading in the relocs. */
245 sym -> relocs = nlm_relocs;
303 struct reloc_and_sec *relocs)
320 if (! nlm_sparc_write_reloc (abfd, relocs[i].sec, relocs[i].rel))
|
| elf32-lm32.c | 53 /* The linker needs to keep track of the number of relocs that it
54 decides to copy as dynamic relocs in check_relocs for each symbol.
66 /* Total number of relocs copied for the input section. */
69 /* Number of pc-relative relocs copied for the input section. */
79 /* Track dynamic relocs copied for this symbol. */
242 /* Fixup section for R_LM32_32 relocs. */
813 Elf_Internal_Rela *relocs,
836 rel = relocs;
837 relend = relocs + input_section->reloc_count;
2125 bfd_boolean relocs; local
[all...] |
| elf32-fr30.c | 387 routines, but a few relocs, we have to do them ourselves. */
472 The relocs are always passed as Rela structures; if the section
477 necessary, and (if using Rela relocs and generating a relocatable
503 Elf_Internal_Rela *relocs,
514 relend = relocs + input_section->reloc_count;
516 for (rel = relocs; rel < relend; rel ++)
642 /* Look through the relocs for a section during the first phase.
644 virtual table relocs for gc. */
650 const Elf_Internal_Rela *relocs)
663 rel_end = relocs + sec->reloc_count
[all...] |
| elf32-crx.c | 608 irel = elf_section_data (sec)->relocs;
616 /* Adjust all the relocs. */
617 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
636 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
805 if (elf_section_data (input_section)->relocs != internal_relocs)
818 && elf_section_data (input_section)->relocs != internal_relocs)
828 bfd_byte *contents, Elf_Internal_Rela *relocs,
839 rel = relocs;
840 relend = relocs + input_section->reloc_count;
974 this section does not have relocs, or if this is not
[all...] |
| /toolchain/binutils/binutils-2.25/ld/emultempl/ |
| m68kcoff.em | 6 /* Handle embedded relocs for m68k.
9 by Steve Chamberlain <steve@cygnus.com>, embedded relocs code based on
77 einfo ("%F%B: all input objects must be COFF for --embedded-relocs\n");
86 read in the relocs into BFD canonical form, which would waste
111 relocs. This is called via bfd_map_over_sections. */
119 einfo ("%B%X: section %s has relocs; can not use --embedded-relocs\n",
124 been set. If we are generating embedded relocs, it calls a special
|
| m68kelf.em | 74 /* In the embedded relocs mode we create a .emreloc section for each
84 generate the embedded relocs, and we have such functions only for
88 einfo ("%F%B: all input objects must be COFF or ELF for --embedded-relocs\n");
97 read in the relocs into BFD canonical form, which would waste
125 relocs. This is called via bfd_map_over_sections. */
133 einfo ("%B%X: section %s has relocs; can not use --embedded-relocs\n",
154 /* If we are generating embedded relocs, call a special BFD backend
|
| /external/libdrm/radeon/ |
| radeon_cs_gem.c | 80 uint32_t *relocs; member in struct:cs_gem
159 csg->base.relocs = csg->relocs = (uint32_t*)calloc(1, 4096);
160 if (csg->relocs == NULL) {
171 csg->chunks[1].chunk_data = (uint64_t)(uintptr_t)csg->relocs;
211 reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
254 tmp = (uint32_t*)realloc(csg->relocs, size);
258 cs->relocs = csg->relocs = tmp;
260 csg->chunks[1].chunk_data = (uint64_t)(uintptr_t)csg->relocs;
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-i386/ |
| i386.exp | 22 # Test i386 linking; all types of relocs. This tests the assembler and
29 {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
35 {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
173 {"Basic --emit-relocs support" "-shared -melf_i386 --emit-relocs" "" "--32"
174 {emit-relocs.s} {{readelf --relocs emit-relocs.rd}} "emit-relocs.so"}
|
| /external/llvm/test/tools/llvm-readobj/ |
| relocations.test | 3 RUN: llvm-readobj -r %p/Inputs/bad-relocs.obj.coff-i386 \
4 RUN: | FileCheck %s -check-prefix BAD-COFF-RELOCS
5 RUN: llvm-readobj -r %p/Inputs/relocs-no-symtab.obj.coff-i386 \
6 RUN: | FileCheck %s -check-prefix BAD-COFF-RELOCS
13 RUN: llvm-readobj -r --expand-relocs %p/Inputs/trivial.obj.macho-ppc \
15 RUN: llvm-readobj -r --expand-relocs %p/Inputs/trivial.obj.macho-ppc64 \
17 RUN: llvm-readobj -r -expand-relocs %p/Inputs/trivial.obj.macho-arm \
28 BAD-COFF-RELOCS: Relocations [
29 BAD-COFF-RELOCS-NEXT: Section (1) sec {
30 BAD-COFF-RELOCS-NEXT: 0xDEADBEEF IMAGE_REL_I386_ABSOLUTE
[all...] |
| /external/mesa3d/src/gallium/winsys/i915/sw/ |
| i915_sw_batchbuffer.c | 36 batch->base.relocs = 0;
51 batch->base.relocs = 0;
96 batch->base.relocs++;
|
| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| radeon_drm_cs.h | 42 /* Relocs. */
47 struct drm_radeon_cs_reloc *relocs; member in struct:radeon_cs_context
112 return cs->csc->relocs[index].write_domain != 0;
|
| radeon_drm_cs.c | 109 csc->relocs = (struct drm_radeon_cs_reloc*)
111 if (!csc->relocs) {
121 csc->chunks[1].chunk_data = (uint64_t)(uintptr_t)csc->relocs;
156 FREE(csc->relocs);
218 reloc = &csc->relocs[i];
223 /* Hash collision, look for the BO in the list of relocs linearly. */
226 reloc = &csc->relocs[i];
233 * the following sequence of relocs:
261 reloc = &csc->relocs[i];
267 /* Hash collision, look for the BO in the list of relocs linearly. *
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| obj-macho.h | 102 #define SET_SECTION_RELOCS(sec, relocs, n) \
103 obj_mach_o_reorder_section_relocs (sec, relocs, n)
107 /* Emit relocs for local subtracts, to cater for subsections-via-symbols. */
|
| tc-m32r.h | 46 #define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs. */
77 HI16 relocs and queue them up for later sorting. */
97 /* When relaxing, we need to emit various relocs we otherwise wouldn't. */
|
| tc-m32c.h | 45 #define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */
56 /* When relaxing, we need to emit various relocs we otherwise wouldn't. */
|
| /toolchain/binutils/binutils-2.25/include/elf/ |
| alpha.h | 72 /* Alpha relocs. */
87 /* Skip 12 - 16; deprecated ECOFF relocs. */
93 /* Skip 20 - 23; deprecated ECOFF relocs. */
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetObjectFile.cpp | 35 // reference the descriptor. The linker must convert copy relocs of
37 // because of an ordering problem with initialization of copy relocs and
|
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| radeonsi_pm4.h | 58 /* relocs for shader data */
60 unsigned relocs[SI_PM4_MAX_RELOCS]; member in struct:si_pm4_state
|
| /toolchain/binutils/binutils-2.25/gold/po/ |
| POTFILES.in | 17 copy-relocs.cc
18 copy-relocs.h
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/ |
| sh-vxworks.exp | 31 {{readelf --relocs vxworks1-lib.rd}
38 {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1$suffix.dd}}
|
| /device/google/contexthub/firmware/app/ |
| common.mk | 32 $(OBJCOPY) -j.relocs -j.flash -j.data -j.dynsym -O binary $(APP_ELF) $(APP_BIN)
|
