| /prebuilts/gcc/darwin-x86/host/i686-apple-darwin-4.2.1/lib/gcc/i686-apple-darwin10/4.2.1/include/ |
| float.h | 35 #undef FLT_RADIX
39 #undef FLT_MANT_DIG
40 #undef DBL_MANT_DIG
41 #undef LDBL_MANT_DIG
53 #undef FLT_DIG
54 #undef DBL_DIG
55 #undef LDBL_DIG
61 #undef FLT_MIN_EXP
62 #undef DBL_MIN_EXP
63 #undef LDBL_MIN_EX
[all...] |
| /prebuilts/gcc/darwin-x86/host/i686-apple-darwin-4.2.1/lib/gcc/i686-apple-darwin11/4.2.1/include/ |
| float.h | 35 #undef FLT_RADIX
39 #undef FLT_MANT_DIG
40 #undef DBL_MANT_DIG
41 #undef LDBL_MANT_DIG
53 #undef FLT_DIG
54 #undef DBL_DIG
55 #undef LDBL_DIG
61 #undef FLT_MIN_EXP
62 #undef DBL_MIN_EXP
63 #undef LDBL_MIN_EX
[all...] |
| /external/curl/include/curl/ |
| mprintf.h | 48 # undef printf
49 # undef fprintf
50 # undef sprintf
51 # undef vsprintf
52 # undef snprintf
53 # undef vprintf
54 # undef vfprintf
55 # undef vsnprintf
56 # undef aprintf
57 # undef vaprint
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-aapcs-be.ll | 19 %call = tail call i32 @test_narrow_args_callee(i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i64 undef, i8 8, i16 9)
37 %val = insertvalue [1 x float] undef, float 0.0, 0
38 call float @test_block_addr([8 x float] undef, [1 x float] %val
[all...] |
| /external/llvm/test/CodeGen/AMDGPU/ |
| llvm.SI.packf16.ll | 11 %p1 = call i32 @llvm.SI.packf16(float undef, float %src)
12 %p2 = call i32 @llvm.SI.packf16(float %src, float undef)
13 %p3 = call i32 @llvm.SI.packf16(float undef, float undef)
17 call void @llvm.SI.export(i32 15, i32 1, i32 0, i32 0, i32 1, float undef, float %f1, float undef, float %f1)
18 call void @llvm.SI.export(i32 15, i32 1, i32 0, i32 0, i32 1, float undef, float %f2, float undef, float %f2)
19 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float undef, float %f3, float undef, float %f2
[all...] |
| subreg-coalescer-crash.ll | 9 br i1 undef, label %for.inc.1, label %do.body.preheader
12 %0 = insertelement <4 x i32> zeroinitializer, i32 undef, i32 1
13 br i1 undef, label %do.body56.1, label %do.body90
17 %2 = insertelement <4 x i32> %1, i32 undef, i32 2
18 %3 = insertelement <4 x i32> %2, i32 undef, i32 3
19 br i1 undef, label %do.body124.1, label %do.body.1562.preheader
23 %4 = insertelement <4 x i32> undef, i32 undef, i32 1
27 %5 = insertelement <4 x i32> %0, i32 undef, i32 1
28 %or.cond472.1 = or i1 undef, unde
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| ifcvt10.ll | 15 br i1 undef, label %if.else, label %if.then
18 %mul73 = fmul double undef, 0.000000e+00
19 %sub76 = fsub double %mul73, undef
20 store double %sub76, double* undef, align 4
22 %mul89 = fmul double undef, %call88
23 %sub92 = fsub double %mul89, undef
24 store double %sub92, double* undef, align 4
28 %tmp101 = tail call double @llvm.pow.f64(double undef, double 0x3FD5555555555555)
29 %add112 = fadd double %tmp101, undef
30 %mul118 = fmul double %add112, undef
[all...] |
| 2009-11-13-ScavengerAssert.ll | 13 br i1 undef, label %bb85, label %bb
17 %1 = load float, float* undef, align 4 ; <float> [#uses=1]
18 %2 = fsub float 0.000000e+00, undef ; <float> [#uses=2]
19 %3 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
23 %7 = fmul float %4, undef ; <float> [#uses=1]
24 %8 = fsub float %7, undef ; <float> [#uses=1]
25 %9 = fmul float undef, %2 ; <float> [#uses=1]
26 %10 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
28 %12 = fmul float undef, %6 ; <float> [#uses=1]
33 %17 = select i1 undef, float undef, float %16 ; <float> [#uses=1
[all...] |
| 2009-06-30-RegScavengerAssert2.ll | 15 br i1 undef, label %bb5, label %bb
21 br i1 undef, label %bb6, label %bb8
24 br i1 undef, label %bb8, label %bb6
30 br i1 undef, label %bb10, label %bb11
36 %0 = load i32, i32* undef, align 4 ; <i32> [#uses=3]
38 store i32 %1, i32* undef, align 4
39 %2 = load i32, i32* undef, align 4 ; <i32> [#uses=2]
44 tail call void @diff(i8* undef, i8* %4, i32 undef, i32 %3, i32 undef, i32 undef) nounwin
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| remap-crash.ll | 10 br i1 undef, label %CF78, label %CF86
13 br i1 undef, label %CF78, label %CF84
16 br i1 undef, label %CF84, label %CF87
19 br i1 undef, label %CF78, label %CF82
22 br i1 undef, label %CF82, label %CF83
28 br i1 undef, label %CF, label %CF81
32 br i1 undef, label %CF, label %CF80
35 br i1 undef, label %CF, label %CF76
38 %Sl58 = select i1 undef, <16 x i16> %Se, <16 x i16> %Se
48 %brmerge = or i1 false, undef
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| 2009-08-04-SubregLoweringBug.ll | 12 br i1 undef, label %bb, label %bb6.preheader
15 call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* undef, i32 12, i32 4, i1 false)
16 br i1 undef, label %bb15, label %bb13
22 %0 = fadd float undef, undef ; <float> [#uses=1]
23 %1 = fadd float undef, 1.000000e+00 ; <float> [#uses=1]
24 br i1 undef, label %bb15, label %bb13
28 %r1.1.0.lcssa = phi float [ undef, %bb6.preheader ], [ %0, %bb13 ] ; <float> [#uses=0]
29 store float %r1.0.0.lcssa, float* undef, align
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| avx-shuffle-x86_32.ll | 11 %b = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
23 %v10 = shufflevector <4 x i16> %v9, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
24 %v11 = shufflevector <8 x i16> <i16 undef, i16 undef, i16 undef, i16 undef, i16 0, i16 0, i16 0, i16 0>, <8 x i16> %v10, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 (…)
[all...] |
| 2011-02-21-VirtRegRewriter-KillSubReg.ll | 12 %call747 = call i32 undef(%t* %s, i8* null, i8* undef, i32 128, i8* undef, i32 516) nounwind
13 br i1 undef, label %if.then751, label %if.then758
22 br i1 undef, label %cond.false783, label %cond.true771
25 %call782 = call i8* @__memmove_chk(i8* %add.ptr768, i8* undef, i32 %call747, i32 undef)
30 %call.i1035 = call i8* @__memmove_chk(i8* %add.ptr768, i8* undef, i32 %call747, i32 undef) nounwind
38 %cmp841 = icmp eq i8* undef, nul
[all...] |
| pr18846.ll | 21 br i1 undef, label %for.body29, label %for.body65
24 %0 = load float, float* undef, align 4, !tbaa !1
25 %vecinit7.i4448 = insertelement <8 x float> undef, float %0, i32 7
27 %vecinit7.i4304 = insertelement <8 x float> undef, float %1, i32 7
28 %2 = load float, float* undef, align 4, !tbaa !1
29 %vecinit7.i4196 = insertelement <8 x float> undef, float %2, i32 7
40 %add.ptr200.sum40995067 = or i64 undef, 8
44 %8 = load <8 x float>, <8 x float>* undef, align 16, !tbaa !5
49 %mul.i4690 = fmul <8 x float> %7, undef
50 %add.i4665 = fadd <8 x float> undef, unde
[all...] |
| /external/lzma/CPP/7zip/UI/FileManager/ |
| ProgressDialog2a.rc | 0 #undef bxs
13 #undef y0
14 #undef y1
15 #undef y2
16 #undef y3
17 #undef y4
19 #undef z0
20 #undef z1
21 #undef z2
22 #undef z3
[all...] |
| /external/mesa3d/src/mesa/x86/ |
| mmx_blendtmp.h | 45 #undef ONE
46 #undef TWO
70 #undef ONE
71 #undef TWO
95 #undef ONE
96 #undef TWO
111 #undef TAG
112 #undef LLTAG
113 #undef INIT
114 #undef MAI
[all...] |
| /external/llvm/test/Transforms/Util/ |
| lowerswitch.ll | 8 switch i32 undef, label %BB2 [
33 switch i32 undef, label %bb1 [
59 br i1 undef, label %1, label %._crit_edge
111 br i1 undef, label %11, label %12
123 br i1 undef, label %15, label %16
135 br i1 undef, label %19, label %20
147 br i1 undef, label %23, label %24
162 br i1 undef, label %28, label %29
183 %o.0 = phi float [ undef, %33 ], [ undef, %32 ], [ undef, %31 ], [ undef, %30 ], [ undef, %26 ], [ undef, %25 ], [ undef, %21 ], [ undef, % (…)
[all...] |
| /external/libxml2/os400/ |
| os400config.h.in | 10 #undef HAVE_ANSIDECL_H
19 #undef HAVE_BROKEN_SS_FAMILY
22 #undef HAVE_CLASS
37 #undef HAVE_DL_H
46 #undef HAVE_FINITE
52 #undef HAVE_FPCLASS
55 #undef HAVE_FPRINTF /* Use trio. */
58 #undef HAVE_FP_CLASS
61 #undef HAVE_FP_CLASS_H
64 #undef HAVE_FTIM
[all...] |
| /external/llvm/test/Transforms/ConstProp/ |
| insertvalue.ll | 47 define %struct @undef-test1() {
48 %A = insertvalue %struct undef, i32 1, 0
50 ; CHECK: @undef-test1
51 ; CHECK: ret %struct { i32 1, [4 x i8] undef }
54 define %struct @undef-test2() {
55 %A = insertvalue %struct undef, i8 0, 1, 2
57 ; CHECK: @undef-test2
58 ; CHECK: ret %struct { i32 undef, [4 x i8] [i8 undef, i8 undef, i8 0, i8 undef]
[all...] |
| /hardware/qcom/camera/QCamera2/stack/mm-camera-interface/inc/ |
| mm_camera_dbg.h | 65 #undef CLOGx
73 #undef CLOGI
76 #undef CLOGD
79 #undef CLOGL
82 #undef CLOGW
85 #undef CLOGH
88 #undef CLOGE
96 #undef LOGD
98 #undef LOGL
100 #undef LOG
[all...] |
| /hardware/qcom/camera/QCamera2/util/ |
| QCameraTrace.h | 32 #undef ATRACE_CALL
33 #undef ATRACE_NAME
34 #undef ATRACE_BEGIN
35 #undef ATRACE_INT
36 #undef ATRACE_END
37 #undef ATRACE_BEGIN_SNPRINTF
38 #undef KPI_ATRACE_BEGIN
39 #undef KPI_ATRACE_END
40 #undef KPI_ATRACE_INT
41 #undef ATRACE_TA
[all...] |
| /external/llvm/test/Transforms/BBVectorize/X86/ |
| pr15289.ll | 32 %0 = fmul double undef, undef
33 %1 = fmul double undef, undef
34 %2 = fadd double undef, undef
35 %3 = fmul double undef, 0x3FE8B8B76E3E9919
37 %5 = fsub double -0.000000e+00, undef
38 %6 = fmul double undef, undef
[all...] |
| /external/libxml2/vms/ |
| config.vms | 11 #undef PACKAGE
12 #undef VERSION
13 #undef HAVE_LIBZ
14 #undef HAVE_LIBM
15 #undef HAVE_ISINF
19 #undef HAVE_LIBHISTORY
20 #undef HAVE_LIBREADLINE
25 #undef HAVE_CLASS
28 #undef HAVE_FINITE
34 #undef HAVE_FPCLAS
[all...] |
| /external/libvncserver/rfb/ |
| rfbconfig.h | 9 /* #undef LIBVNCSERVER_AC_APPLE_UNIVERSAL_BUILD */
12 /* #undef LIBVNCSERVER_ALLOW24BPP */
15 /* #undef LIBVNCSERVER_ENOENT_WORKAROUND */
18 /* #undef LIBVNCSERVER_FFMPEG */
21 /* #undef LIBVNCSERVER_HAVE_ANDROID */
29 /* #undef LIBVNCSERVER_HAVE_AVAHI */
32 /* #undef LIBVNCSERVER_HAVE_CRYPT */
40 /* #undef LIBVNCSERVER_HAVE_DOPRNT */
43 /* #undef LIBVNCSERVER_HAVE_DPMS */
46 /* #undef LIBVNCSERVER_HAVE_FBPM *
[all...] |
| /external/tcpdump/ |
| config.h | 15 /* #undef HAVE_DECL_ETHER_NTOHOST */
18 /* #undef HAVE_DNET_HTOA */
21 /* #undef HAVE_ETHER_NTOHOST */
33 /* #undef HAVE_GETRPCBYNUMBER */
45 /* #undef HAVE_LIBRPC */
48 /* #undef HAVE_LIBSMI */
54 /* #undef HAVE_NETDNET_DNETDB_H */
57 /* #undef HAVE_NETDNET_DNETDB_H_DNET_HTOA */
66 /* #undef HAVE_NET_PFVAR_H */
72 /* #undef HAVE_OS_PROTO_H *
[all...] |
