| /external/llvm/test/Bitcode/ |
| shuffle.ll | 19 <4 x i32> <i32 0, i32 0, i32 0, i32 undef> to <2 x double>)
22 <3 x float> undef,
23 <4 x i32> <i32 0, i32 1, i32 2, i32 undef>),
24 <4 x float> undef,
26 <3 x float> undef,
27 <4 x i32> <i32 0, i32 1, i32 2, i32 undef>)
|
| /external/llvm/test/CodeGen/ARM/ |
| 2009-11-02-NegativeLane.ll | 7 br i1 undef, label %return, label %bb
11 %0 = load i16, i16* undef, align 2
12 %1 = insertelement <8 x i16> undef, i16 %0, i32 2
13 %2 = insertelement <8 x i16> %1, i16 undef, i32 3
16 store i16 %4, i16* undef, align 2
17 br i1 undef, label %return, label %bb
|
| 2012-04-02-TwoAddrInstrCrash.ll | 7 br i1 undef, label %5, label %1
10 %2 = shufflevector <1 x i64> zeroinitializer, <1 x i64> undef, <2 x i32> <i32 0, i32 1>
12 store <4 x float> zeroinitializer, <4 x float>* undef, align 16
13 store <4 x float> zeroinitializer, <4 x float>* undef, align 16
14 store <4 x float> %3, <4 x float>* undef, align 16
16 store <4 x float> %4, <4 x float>* undef, align 16
|
| data-in-code-annotations.ll | 19 switch i32 undef, label %return [
36 %div = sdiv i32 undef, undef
40 %retval.0 = phi i32 [ %div, %sw.bb20 ], [ undef, %sw.bb13 ], [ undef, %sw.bb6 ], [ undef, %sw.bb ], [ 0, %entry ]
|
| jumptable-label.ll | 10 switch i32 undef, label %return [
27 %div = sdiv i32 undef, undef
31 %retval.0 = phi i32 [ %div, %sw.bb20 ], [ undef, %sw.bb13 ], [ undef, %sw.bb6 ], [ undef, %sw.bb ], [ 0, %entry ]
|
| 2009-06-30-RegScavengerAssert.ll | 17 br i1 undef, label %bb5, label %bb
23 br i1 undef, label %bb6, label %bb8
26 br i1 undef, label %bb8, label %bb6
32 br i1 undef, label %bb10, label %bb11
38 %0 = load i32, i32* undef, align 4 ; <i32> [#uses=2]
40 store i32 %1, i32* undef, align 4
41 %2 = load i32, i32* undef, align 4 ; <i32> [#uses=1]
47 tail call void @diff(i8* undef, i8* %3, i32 undef, i32 undef, i32 undef, i32 undef) nounwin
[all...] |
| 2009-06-30-RegScavengerAssert3.ll | 7 br i1 undef, label %bb5, label %bb
13 br i1 undef, label %bb6, label %bb8
16 br i1 undef, label %bb8, label %bb6
22 br i1 undef, label %bb10, label %bb11
28 br i1 undef, label %bb15, label %bb12
35 br i1 undef, label %bb138.i, label %bb145.i
42 br i1 undef, label %bb146.i, label %bb151.i
45 br i1 undef, label %bb228.i, label %bb151.i
49 %or.cond298 = and i1 undef, %.not297 ; <i1> [#uses=1]
53 br i1 undef, label %bb220.i, label %bb.nph.i9
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| bv-pres-v8i1.ll | 9 br i1 undef, label %CF78, label %CF87
13 %Cmp26 = icmp slt i32 -1, undef
17 br i1 undef, label %CF79, label %CF82
20 br i1 undef, label %CF82, label %CF84
26 br i1 undef, label %CF, label %CF85
30 %Cmp61 = icmp ult i32 477567, undef
|
| std-unal-fi.ll | 8 %Shuff = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> <i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 undef, i32 29, i32 31, i32 1, i32 3, i32 5>
12 %L5 = load i64, i64* undef
14 %Shuff7 = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> %Shuff, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 undef, i32 20, i32 22, i32 24, i32 26>
16 br i1 undef, label %CF, label %CF77
19 br i1 undef, label %CF77, label %CF82
22 %L19 = load i64, i64* undef
25 br i1 undef, label %CF82, label %CF83
28 %L34 = load i64, i64* undef
29 br i1 undef, label %CF77, label %CF81
32 %Shuff43 = shufflevector <16 x i32> %Shuff7, <16 x i32> undef, <16 x i32> <i32 15, i32 17, i32 19, i32 21, i32 23, i32 undef, i32 undef, i32 29, i32 31, i32 und (…)
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| 2010-01-07-ISelBug.ll | 9 br i1 undef, label %for.body161, label %for.end197
15 %mlucEntry.4 = phi i96 [ undef, %for.body161 ], [ undef, %if.end.i11 ] ; <i96> [#uses=2]
16 store i96 %mlucEntry.4, i96* undef, align 8
20 store i32 %tmp1.i1.i, i32* undef, align 8
24 ret i32 undef
|
| 2011-01-07-LegalizeTypesCrash.ll | 7 %i17 = icmp eq <4 x i8> undef, zeroinitializer
9 %_comp = select i1 %cond, i8 0, i8 undef
10 %merge = insertelement <4 x i8> undef, i8 %_comp, i32 0
12 %_comp4 = select i1 %cond3, i8 0, i8 undef
15 %_comp9 = select i1 %cond8, i8 0, i8 undef
17 store <4 x i8> %m387, <4 x i8>* undef
|
| 2011-12-06-AVXVectorExtractCombine.ll | 12 %c = shufflevector <4 x i32> %b, <4 x i32> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>
13 %d = shufflevector <8 x i32> %c, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
|
| dagcombine-buildvector.ll | 11 %tmp7.i = shufflevector <4 x double> %src, <4 x double> undef, <2 x i32> < i32 0, i32 2 >
21 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
| vec_shift2.ll | 5 %tmp2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp1, <8 x i16> bitcast (<4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > to <8 x i16>) ) nounwind readnone
12 %tmp2 = tail call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp1, <4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > ) nounwind readnone
|
| 2009-07-15-CoalescerBug.ll | 40 br i1 undef, label %bb21, label %bb
46 switch i32 undef, label %bb103 [
61 br i1 undef, label %bb69, label %bb70
64 ret i32 undef
76 switch i32 undef, label %bb104 [
168 ret i32 undef
195 br i1 undef, label %bb1498, label %bb1496
198 br i1 undef, label %bb1498, label %bb1510.preheader
204 br i1 undef, label %bb1511, label %bb1518
210 switch i32 undef, label %bb741.i4285
[all...] |
| /external/ltrace/sysdeps/linux-gnu/sparc/ |
| ptrace.h | 21 #undef PTRACE_GETREGS
22 #undef PTRACE_SETREGS
23 #undef PTRACE_GETFPREGS
24 #undef PTRACE_SETFPREGS
29 #undef PT_DETACH
30 #undef PTRACE_DETACH
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/config/ |
| initfini-array.h | 25 #undef INIT_SECTION_ASM_OP
26 #undef FINI_SECTION_ASM_OP
28 #undef INIT_ARRAY_SECTION_ASM_OP
31 #undef FINI_ARRAY_SECTION_ASM_OP
35 #undef TARGET_ASM_CONSTRUCTOR
37 #undef TARGET_ASM_DESTRUCTOR
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| e-mipself.c | 40 #undef emul_name
41 #undef emul_struct_name
42 #undef emul_default_endian
49 #undef emul_name
50 #undef emul_struct_name
51 #undef emul_default_endian
|
| /external/jemalloc/include/jemalloc/internal/ |
| jemalloc_internal_defs.h | 34 /* #undef JEMALLOC_ATOMIC9 */
40 /* #undef JEMALLOC_OSATOMIC */
48 /* #undef JE_FORCE_SYNC_COMPARE_AND_SWAP_4 */
56 /* #undef JE_FORCE_SYNC_COMPARE_AND_SWAP_8 */
72 /* #undef JEMALLOC_OSSPIN */
77 /* #undef JEMALLOC_HAVE_SECURE_GETENV */
82 /* #undef JEMALLOC_HAVE_ISSETUGID */
91 /* #undef JEMALLOC_MALLOC_THREAD_CLEANUP */
105 /* #undef JEMALLOC_MUTEX_INIT_CB */
114 /* #undef JEMALLOC_CODE_COVERAGE *
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| 2009-11-11-ScavengerAssert.ll | 11 br i1 undef, label %bb21, label %bb5
14 br i1 undef, label %bb13, label %bb6
17 br i1 undef, label %bb8, label %bb7
26 call void @Perl_sv_setiv(%struct.SV* undef, i32 %storemerge5) nounwind
27 %6 = getelementptr inbounds %struct.SV, %struct.SV* undef, i32 0, i32 2 ; <i32*> [#uses=1]
37 call void @Perl_mg_set(%struct.SV* undef) nounwind
41 store %struct.SV* undef, %struct.SV** null, align 4
46 br i1 undef, label %bb.i, label %bb1.i
49 call void @Perl_sv_setiv(%struct.SV* undef, i32 undef) nounwin
[all...] |
| /ndk/tests/device/issue42891-boost-1_52/jni/boost/boost/type_traits/detail/ |
| bool_trait_def.hpp | 22 // cleaning up afterwards: so we'd better undef the macros just in case
26 #undef BOOST_TT_AUX_BOOL_TRAIT_VALUE_DECL
27 #undef BOOST_TT_AUX_BOOL_C_BASE
28 #undef BOOST_TT_AUX_BOOL_TRAIT_DEF1
29 #undef BOOST_TT_AUX_BOOL_TRAIT_DEF2
30 #undef BOOST_TT_AUX_BOOL_TRAIT_SPEC1
31 #undef BOOST_TT_AUX_BOOL_TRAIT_SPEC2
32 #undef BOOST_TT_AUX_BOOL_TRAIT_IMPL_SPEC1
33 #undef BOOST_TT_AUX_BOOL_TRAIT_IMPL_SPEC2
34 #undef BOOST_TT_AUX_BOOL_TRAIT_PARTIAL_SPEC1_
[all...] |
| /prebuilts/ndk/current/sources/cxx-stl/gnu-libstdc++/4.9/libs/armeabi/include/bits/ |
| c++config.h | 308 # undef _GLIBCXX_EXTERN_TEMPLATE
346 #undef _GLIBCXX_LONG_DOUBLE_COMPAT
466 #undef min
467 #undef max
477 /* #undef _GLIBCXX_HAVE_ACOSL */
483 /* #undef _GLIBCXX_HAVE_ASINL */
492 /* #undef _GLIBCXX_HAVE_ATAN2L */
498 /* #undef _GLIBCXX_HAVE_ATANL */
501 /* #undef _GLIBCXX_HAVE_AT_QUICK_EXIT */
504 /* #undef _GLIBCXX_HAVE_CC_TLS *
[all...] |
| /prebuilts/ndk/current/sources/cxx-stl/gnu-libstdc++/4.9/libs/armeabi-v7a/include/bits/ |
| c++config.h | 308 # undef _GLIBCXX_EXTERN_TEMPLATE
346 #undef _GLIBCXX_LONG_DOUBLE_COMPAT
466 #undef min
467 #undef max
477 /* #undef _GLIBCXX_HAVE_ACOSL */
483 /* #undef _GLIBCXX_HAVE_ASINL */
492 /* #undef _GLIBCXX_HAVE_ATAN2L */
498 /* #undef _GLIBCXX_HAVE_ATANL */
501 /* #undef _GLIBCXX_HAVE_AT_QUICK_EXIT */
504 /* #undef _GLIBCXX_HAVE_CC_TLS *
[all...] |
| /prebuilts/ndk/current/sources/cxx-stl/gnu-libstdc++/4.9/libs/mips/include/bits/ |
| c++config.h | 308 # undef _GLIBCXX_EXTERN_TEMPLATE
346 #undef _GLIBCXX_LONG_DOUBLE_COMPAT
466 #undef min
467 #undef max
477 /* #undef _GLIBCXX_HAVE_ACOSL */
483 /* #undef _GLIBCXX_HAVE_ASINL */
492 /* #undef _GLIBCXX_HAVE_ATAN2L */
498 /* #undef _GLIBCXX_HAVE_ATANL */
501 /* #undef _GLIBCXX_HAVE_AT_QUICK_EXIT */
504 /* #undef _GLIBCXX_HAVE_CC_TLS *
[all...] |
| /prebuilts/ndk/current/sources/cxx-stl/gnu-libstdc++/4.9/libs/mips32r6/include/bits/ |
| c++config.h | 308 # undef _GLIBCXX_EXTERN_TEMPLATE
346 #undef _GLIBCXX_LONG_DOUBLE_COMPAT
466 #undef min
467 #undef max
477 /* #undef _GLIBCXX_HAVE_ACOSL */
483 /* #undef _GLIBCXX_HAVE_ASINL */
492 /* #undef _GLIBCXX_HAVE_ATAN2L */
498 /* #undef _GLIBCXX_HAVE_ATANL */
501 /* #undef _GLIBCXX_HAVE_AT_QUICK_EXIT */
504 /* #undef _GLIBCXX_HAVE_CC_TLS *
[all...] |
