| /external/llvm/test/CodeGen/ARM/ |
| cttz_vector.ll | 176 ; CHECK: vadd.i64 [[D1]], [[D1]], [[D3]]
195 ; CHECK: vadd.i64 [[Q1]], [[Q1]], [[Q3]]
354 ; CHECK: vadd.i64 [[D1]], [[D1]], [[D3]]
373 ; CHECK: vadd.i64 [[Q1]], [[Q1]], [[Q3]]
|
| reg_sequence.ll | 114 ; CHECK-NEXT: vadd.i32
115 ; CHECK-NEXT: vadd.i32
128 ; CHECK: vadd.i32
147 ; CHECK: vadd.i16
277 ; CHECK: vadd.f32 q8, q8, q8
|
| interrupt-attr.ll | 128 ; CHECK-A: vadd.f64 {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
|
| debug-info-branch-folding.ll | 5 ;CHECK: vadd.f32 q4, q8, q8
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Syn_filt_32_neon.s | 105 VADD.S32 Q12, Q12, Q10 @L_tmp = L_tmp - (result1 >>= 11) - (result2 <<= 1)
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_DeblockingChroma_unsafe_s.s | 142 VADD dTC, dTC3210, dMask_1
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| vfp-neon-syntax-inc.s | 72 dyadic_c vadd
|
| neon-cov.d | [all...] |
| /external/webp/src/dsp/ |
| enc_neon.c | 406 "vadd.s16 d4, d0, d3 \n" // a0 = d0 + d3
407 "vadd.s16 d5, d1, d2 \n" // a1 = d1 + d2
411 "vadd.s16 d0, d4, d5 \n" // a0 + a1
435 "vadd.s16 d4, d0, d3 \n" // a1 = ip[0] + ip[12]
436 "vadd.s16 d5, d1, d2 \n" // b1 = ip[4] + ip[8]
438 "vadd.s16 d4, d4, d26 \n" // a1 + 7
441 "vadd.s16 d0, d4, d5 \n" // op[0] = a1 + b1 + 7
[all...] |
| /external/boringssl/src/crypto/aes/asm/ |
| bsaes-armv7.pl | [all...] |
| /external/llvm/test/MC/ARM/ |
| fullfp16-neon.s | 4 vadd.f16 d0, d1, d2
5 vadd.f16 q0, q1, q2
6 @ ARM: vadd.f16 d0, d1, d2 @ encoding: [0x02,0x0d,0x11,0xf2]
7 @ ARM: vadd.f16 q0, q1, q2 @ encoding: [0x44,0x0d,0x12,0xf2]
8 @ THUMB: vadd.f16 d0, d1, d2 @ encoding: [0x11,0xef,0x02,0x0d]
9 @ THUMB: vadd.f16 q0, q1, q2 @ encoding: [0x12,0xef,0x44,0x0d]
|
| single-precision-fp.s | 5 vadd.f64 d0, d1, d2
11 @ CHECK-ERRORS-NEXT: vadd.f64 d0, d1, d2
|
| simple-fp-encoding.s | 3 vadd.f64 d16, d17, d16
4 vadd.f32 s0, s1, s0
5 @ CHECK: vadd.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x71,0xee]
6 @ CHECK: vadd.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x30,0xee]
|
| /external/opencv3/modules/core/include/opencv2/core/cuda/ |
| simd_functions.hpp | 95 asm("vadd.u32.u32.u32.sat %0.h0, %1.h0, %2.h0, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
96 asm("vadd.u32.u32.u32.sat %0.h1, %1.h1, %2.h1, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
485 asm("vadd.u32.u32.u32.sat %0.b0, %1.b0, %2.b0, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
486 asm("vadd.u32.u32.u32.sat %0.b1, %1.b1, %2.b1, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
487 asm("vadd.u32.u32.u32.sat %0.b2, %1.b2, %2.b2, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
488 asm("vadd.u32.u32.u32.sat %0.b3, %1.b3, %2.b3, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
|
| /external/opencv3/modules/cudev/include/opencv2/cudev/util/ |
| simd_functions.hpp | 143 asm("vadd.u32.u32.u32.sat %0.h0, %1.h0, %2.h0, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
144 asm("vadd.u32.u32.u32.sat %0.h1, %1.h1, %2.h1, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
533 asm("vadd.u32.u32.u32.sat %0.b0, %1.b0, %2.b0, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
534 asm("vadd.u32.u32.u32.sat %0.b1, %1.b1, %2.b1, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
535 asm("vadd.u32.u32.u32.sat %0.b2, %1.b2, %2.b2, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
536 asm("vadd.u32.u32.u32.sat %0.b3, %1.b3, %2.b3, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
|
| /external/valgrind/none/tests/arm/ |
| neon128.c | 411 printf("---- VADD ----\n");
412 TESTINSN_bin("vadd.i32 q0, q1, q2", q0, q1, i32, 24, q2, i32, 120);
413 TESTINSN_bin("vadd.i64 q0, q1, q2", q0, q1, i32, 140, q2, i32, 120);
414 TESTINSN_bin("vadd.i32 q0, q1, q2", q0, q1, i32, 140, q2, i32, 120);
415 TESTINSN_bin("vadd.i16 q0, q1, q2", q0, q1, i32, 140, q2, i32, 120);
416 TESTINSN_bin("vadd.i8 q0, q1, q2", q0, q1, i32, 140, q2, i32, 120);
417 TESTINSN_bin("vadd.i8 q0, q1, q2", q0, q1, i32, (1 << 31) + 1, q2, i32, (1 << 31) + 2);
418 TESTINSN_bin("vadd.i16 q0, q1, q2", q0, q1, i32, (1 << 31) + 1, q2, i32, (1 << 31) + 2);
419 TESTINSN_bin("vadd.i32 q0, q1, q2", q0, q1, i32, (1 << 31) + 1, q2, i32, (1 << 31) + 2);
420 TESTINSN_bin("vadd.i64 q0, q1, q2", q0, q1, i32, (1 << 31) + 1, q2, i32, (1 << 31) + 2)
[all...] |
| neon64.c | 705 printf("---- VADD ----\n");
706 TESTINSN_bin("vadd.i32 d0, d1, d2", d0, d1, i32, 24, d2, i32, 120);
707 TESTINSN_bin("vadd.i64 d0, d1, d2", d0, d1, i32, 140, d2, i32, 120);
708 TESTINSN_bin("vadd.i32 d0, d1, d2", d0, d1, i32, 140, d2, i32, 120);
709 TESTINSN_bin("vadd.i16 d0, d1, d2", d0, d1, i32, 140, d2, i32, 120);
710 TESTINSN_bin("vadd.i8 d0, d1, d2", d0, d1, i32, 140, d2, i32, 120);
711 TESTINSN_bin("vadd.i8 d0, d1, d2", d0, d1, i32, (1 << 31) + 1, d2, i32, (1 << 31) + 2);
712 TESTINSN_bin("vadd.i16 d0, d1, d2", d0, d1, i32, (1 << 31) + 1, d2, i32, (1 << 31) + 2);
713 TESTINSN_bin("vadd.i32 d0, d1, d2", d0, d1, i32, (1 << 31) + 1, d2, i32, (1 << 31) + 2);
714 TESTINSN_bin("vadd.i64 d0, d1, d2", d0, d1, i32, (1 << 31) + 1, d2, i32, (1 << 31) + 2)
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| fullfp16-neon-arm.txt | 4 # CHECK: vadd.f16 d0, d1, d2
5 # CHECK: vadd.f16 q0, q1, q2
|
| fullfp16-neon-thumb.txt | 4 # CHECK: vadd.f16 d0, d1, d2
5 # CHECK: vadd.f16 q0, q1, q2
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
| armCOMM_IDCT_s.h | 869 VADD qXf3, qXg3, qXg4
871 VADD qXf2, qXg2, qXg5
873 VADD qXf1, qXg1, qXg6
875 VADD qXf0, qXg0, qXg7
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
| armCOMM_IDCT_s.h | 875 VADD qXf3, qXg3, qXg4
877 VADD qXf2, qXg2, qXg5
879 VADD qXf1, qXg1, qXg6
881 VADD qXf0, qXg0, qXg7
[all...] |
| /prebuilts/gcc/darwin-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/ |
| arm_neon.h | 415 //Vector add: vadd -> Vr[i]:=Va[i]+Vb[i], Vr, Va, Vb have equal lane sizes.
416 int8x8_t vadd_s8(int8x8_t a, int8x8_t b); // VADD.I8 d0,d0,d0
417 int16x4_t vadd_s16(int16x4_t a, int16x4_t b); // VADD.I16 d0,d0,d0
418 int32x2_t vadd_s32(int32x2_t a, int32x2_t b); // VADD.I32 d0,d0,d0
419 int64x1_t vadd_s64(int64x1_t a, int64x1_t b); // VADD.I64 d0,d0,d0
420 float32x2_t vadd_f32(float32x2_t a, float32x2_t b); // VADD.F32 d0,d0,d0
421 uint8x8_t vadd_u8(uint8x8_t a, uint8x8_t b); // VADD.I8 d0,d0,d0
422 uint16x4_t vadd_u16(uint16x4_t a, uint16x4_t b); // VADD.I16 d0,d0,d0
423 uint32x2_t vadd_u32(uint32x2_t a, uint32x2_t b); // VADD.I32 d0,d0,d0
424 uint64x1_t vadd_u64(uint64x1_t a, uint64x1_t b); // VADD.I64 d0,d0,d
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/lib/gcc/x86_64-linux/4.8/include/ |
| arm_neon.h | 415 //Vector add: vadd -> Vr[i]:=Va[i]+Vb[i], Vr, Va, Vb have equal lane sizes.
416 int8x8_t vadd_s8(int8x8_t a, int8x8_t b); // VADD.I8 d0,d0,d0
417 int16x4_t vadd_s16(int16x4_t a, int16x4_t b); // VADD.I16 d0,d0,d0
418 int32x2_t vadd_s32(int32x2_t a, int32x2_t b); // VADD.I32 d0,d0,d0
419 int64x1_t vadd_s64(int64x1_t a, int64x1_t b); // VADD.I64 d0,d0,d0
420 float32x2_t vadd_f32(float32x2_t a, float32x2_t b); // VADD.F32 d0,d0,d0
421 uint8x8_t vadd_u8(uint8x8_t a, uint8x8_t b); // VADD.I8 d0,d0,d0
422 uint16x4_t vadd_u16(uint16x4_t a, uint16x4_t b); // VADD.I16 d0,d0,d0
423 uint32x2_t vadd_u32(uint32x2_t a, uint32x2_t b); // VADD.I32 d0,d0,d0
424 uint64x1_t vadd_u64(uint64x1_t a, uint64x1_t b); // VADD.I64 d0,d0,d
[all...] |
| /prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/ |
| arm_neon.h | 415 //Vector add: vadd -> Vr[i]:=Va[i]+Vb[i], Vr, Va, Vb have equal lane sizes.
416 int8x8_t vadd_s8(int8x8_t a, int8x8_t b); // VADD.I8 d0,d0,d0
417 int16x4_t vadd_s16(int16x4_t a, int16x4_t b); // VADD.I16 d0,d0,d0
418 int32x2_t vadd_s32(int32x2_t a, int32x2_t b); // VADD.I32 d0,d0,d0
419 int64x1_t vadd_s64(int64x1_t a, int64x1_t b); // VADD.I64 d0,d0,d0
420 float32x2_t vadd_f32(float32x2_t a, float32x2_t b); // VADD.F32 d0,d0,d0
421 uint8x8_t vadd_u8(uint8x8_t a, uint8x8_t b); // VADD.I8 d0,d0,d0
422 uint16x4_t vadd_u16(uint16x4_t a, uint16x4_t b); // VADD.I16 d0,d0,d0
423 uint32x2_t vadd_u32(uint32x2_t a, uint32x2_t b); // VADD.I32 d0,d0,d0
424 uint64x1_t vadd_u64(uint64x1_t a, uint64x1_t b); // VADD.I64 d0,d0,d
[all...] |
| /external/gemmlowp/meta/generators/ |
| neon_emitter.py | 273 self.EmitOp3('vadd.%s' % add_type, destination, source_1, source_2)
|
