HomeSort by relevance Sort by last modified time
    Searched full:vsub (Results 101 - 125 of 192) sorted by null

1 2 3 45 6 7 8

  /external/libhevc/common/arm/
ihevc_deblk_chroma_vert.s 140 vsub.i16 q1,q9,q1
ihevc_intra_pred_filters_chroma_mode_11_to_17.s 308 vsub.s8 d8, d8, d26 @ref_main_idx (row 0)
311 vsub.s8 d7, d28, d6 @32-fract
442 vsub.s8 d8, d8, d26 @ref_main_idx
497 vsub.s8 d7, d28, d6 @32-fract
  /external/llvm/test/CodeGen/ARM/
vshift.ll 171 ;CHECK: vsub.i64
243 ;CHECK: vsub.i64
322 ;CHECK: vsub.i64
394 ;CHECK: vsub.i64
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/
omxVCM4P2_QuantInvInter_I_s.s 131 VSUB dMinusQP1,dConst0,dQP1 ;// dMinusQP1=-QP1
omxVCM4P2_QuantInvIntra_I_s.s 172 VSUB dMinusQP1,dConst0,dQP1 ;// dMinusQP1=-QP1
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/neon/
vp8_subpixelvariance16x16s_neon.asm 116 vsub.u32 d0, d1, d10
212 vsub.u32 d0, d1, d10
331 vsub.u32 d0, d1, d10
564 vsub.u32 d0, d1, d10
vp8_subpixelvariance8x8_neon.asm 210 vsub.u32 d0, d1, d10
  /system/core/libpixelflinger/
col32cb16blend_neon.S 64 vsub.u16 q3, q15, q3 // invert alpha
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
vfp-neon-syntax-inc.s 73 dyadic_c vsub
neon-cov.d     [all...]
  /external/webp/src/dsp/
enc_neon.c 408 "vsub.s16 d6, d1, d2 \n" // a2 = d1 - d2
409 "vsub.s16 d7, d0, d3 \n" // a3 = d0 - d3
413 "vsub.s16 d2, d4, d5 \n" // a0 - a1
437 "vsub.s16 d6, d1, d2 \n" // c1 = ip[4] - ip[8]
439 "vsub.s16 d7, d0, d3 \n" // d1 = ip[0] - ip[12]
442 "vsub.s16 d2, d4, d5 \n" // op[8] = a1 - b1 + 7
459 "vsub.s16 d1, d1, d4 \n"
    [all...]
  /external/libavc/common/arm/
ih264_deblk_luma_a9.s 139 vsub.i8 q9, q7, q10 @Q9 = C0 + (Ap < Beta)
143 vsub.i8 q9, q9, q11 @Q9 = C0 + (Ap < Beta) + (Aq < Beta)
155 vsub.i16 q14, q14, q13 @Q14,Q5 = [p2 + (p0+q0+1)>>1] - (p1<<1)
156 vsub.i16 q5, q5, q8 @
161 vsub.i16 q2, q2, q8 @
162 vsub.i16 q15, q15, q13 @Q15,Q2 = [q2 + (p0+q0+1)>>1] - (q1<<1)
505 vsub.u8 q8, q8, q11 @C0 + (Ap < Beta)
514 vsub.u8 q8, q8, q10 @C0 + (Ap < Beta) + (Aq < Beta)
    [all...]
ih264_intra_pred_luma_16x16_a9q.s 484 vsub.s16 q15, q15, q14
485 vsub.s16 q15, q15, q13
  /external/llvm/test/MC/ARM/
fullfp16-neon.s 11 vsub.f16 d0, d1, d2
12 vsub.f16 q0, q1, q2
13 @ ARM: vsub.f16 d0, d1, d2 @ encoding: [0x02,0x0d,0x31,0xf2]
14 @ ARM: vsub.f16 q0, q1, q2 @ encoding: [0x44,0x0d,0x32,0xf2]
15 @ THUMB: vsub.f16 d0, d1, d2 @ encoding: [0x31,0xef,0x02,0x0d]
16 @ THUMB: vsub.f16 q0, q1, q2 @ encoding: [0x32,0xef,0x44,0x0d]
single-precision-fp.s 6 vsub.f64 d2, d3, d4
13 @ CHECK-ERRORS-NEXT: vsub.f64 d2, d3, d4
simple-fp-encoding.s 8 vsub.f64 d16, d17, d16
9 vsub.f32 s0, s1, s0
10 @ CHECK: vsub.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x71,0xee]
11 @ CHECK: vsub.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x30,0xee]
  /external/opencv3/modules/core/include/opencv2/core/cuda/
simd_functions.hpp 116 asm("vsub.u32.u32.u32.sat %0.h0, %1.h0, %2.h0, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
117 asm("vsub.u32.u32.u32.sat %0.h1, %1.h1, %2.h1, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
509 asm("vsub.u32.u32.u32.sat %0.b0, %1.b0, %2.b0, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
510 asm("vsub.u32.u32.u32.sat %0.b1, %1.b1, %2.b1, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
511 asm("vsub.u32.u32.u32.sat %0.b2, %1.b2, %2.b2, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
512 asm("vsub.u32.u32.u32.sat %0.b3, %1.b3, %2.b3, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
  /external/opencv3/modules/cudev/include/opencv2/cudev/util/
simd_functions.hpp 164 asm("vsub.u32.u32.u32.sat %0.h0, %1.h0, %2.h0, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
165 asm("vsub.u32.u32.u32.sat %0.h1, %1.h1, %2.h1, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
557 asm("vsub.u32.u32.u32.sat %0.b0, %1.b0, %2.b0, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
558 asm("vsub.u32.u32.u32.sat %0.b1, %1.b1, %2.b1, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
559 asm("vsub.u32.u32.u32.sat %0.b2, %1.b2, %2.b2, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
560 asm("vsub.u32.u32.u32.sat %0.b3, %1.b3, %2.b3, %3;" : "=r"(r) : "r"(a), "r"(b), "r"(r));
  /external/valgrind/none/tests/arm/
neon128.c 424 printf("---- VSUB ----\n");
425 TESTINSN_bin("vsub.i32 q0, q1, q2", q0, q1, i32, 24, q2, i32, 120);
426 TESTINSN_bin("vsub.i64 q0, q1, q2", q0, q1, i32, 140, q2, i32, 120);
427 TESTINSN_bin("vsub.i32 q0, q1, q2", q0, q1, i32, 140, q2, i32, 120);
428 TESTINSN_bin("vsub.i16 q0, q1, q2", q0, q1, i32, 140, q2, i32, 120);
429 TESTINSN_bin("vsub.i8 q0, q1, q2", q0, q1, i32, 140, q2, i32, 120);
430 TESTINSN_bin("vsub.i8 q0, q1, q2", q0, q1, i32, (1 << 31) + 1, q2, i32, (1 << 31) + 2);
431 TESTINSN_bin("vsub.i16 q0, q1, q2", q0, q1, i32, (1 << 31) + 1, q2, i32, (1 << 31) + 2);
432 TESTINSN_bin("vsub.i32 q0, q1, q2", q0, q1, i32, (1 << 31) + 1, q2, i32, (1 << 31) + 2);
433 TESTINSN_bin("vsub.i64 q0, q1, q2", q0, q1, i32, (1 << 31) + 1, q2, i32, (1 << 31) + 2)
    [all...]
neon64.c 719 printf("---- VSUB ----\n");
720 TESTINSN_bin("vsub.i32 d0, d1, d2", d0, d1, i32, 24, d2, i32, 120);
721 TESTINSN_bin("vsub.i64 d0, d1, d2", d0, d1, i32, 140, d2, i32, 120);
722 TESTINSN_bin("vsub.i32 d0, d1, d2", d0, d1, i32, 140, d2, i32, 120);
723 TESTINSN_bin("vsub.i16 d0, d1, d2", d0, d1, i32, 140, d2, i32, 120);
724 TESTINSN_bin("vsub.i8 d0, d1, d2", d0, d1, i32, 140, d2, i32, 120);
725 TESTINSN_bin("vsub.i8 d0, d1, d2", d0, d1, i32, (1 << 31) + 1, d2, i32, (1 << 31) + 2);
726 TESTINSN_bin("vsub.i16 d0, d1, d2", d0, d1, i32, (1 << 31) + 1, d2, i32, (1 << 31) + 2);
727 TESTINSN_bin("vsub.i32 d0, d1, d2", d0, d1, i32, (1 << 31) + 1, d2, i32, (1 << 31) + 2);
728 TESTINSN_bin("vsub.i64 d0, d1, d2", d0, d1, i32, (1 << 31) + 1, d2, i32, (1 << 31) + 2)
    [all...]
  /external/libavc/encoder/arm/
ime_distortion_metrics_a9q.s 1076 vsub.s16 d8, d12, d19 @I (s1 - (s3<<1)) (s4 - (s2<<1))
1080 vsub.s16 d9, d13, d18 @I (s2 - (s4<<1)) (s3 - (s1<<1))
    [all...]
  /external/llvm/test/MC/Disassembler/ARM/
fullfp16-neon-arm.txt 9 # CHECK: vsub.f16 d0, d1, d2
10 # CHECK: vsub.f16 q0, q1, q2
fullfp16-neon-thumb.txt 9 # CHECK: vsub.f16 d0, d1, d2
10 # CHECK: vsub.f16 q0, q1, q2
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/
omxVCM4P10_PredictIntra_16x16_s.s 391 VSUB qHV1,qHV1,qHV
407 VSUB qConst, qA, qConst
  /external/v8/src/arm/
codegen-arm.cc 837 __ vsub(double_scratch1, double_scratch1, result);
841 __ vsub(double_scratch1, double_scratch1, input);
842 __ vsub(result, result, double_scratch1);
847 __ vsub(result, result, double_scratch1);
    [all...]

Completed in 2117 milliseconds

1 2 3 45 6 7 8