/prebuilts/ndk/current/platforms/android-3/arch-arm/usr/include/linux/ |
filter.h | 45 #define BPF_SIZE(code) ((code) & 0x18) 76 #define BPF_RVAL(code) ((code) & 0x18)
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/prebuilts/ndk/current/platforms/android-4/arch-arm/usr/include/linux/ |
filter.h | 45 #define BPF_SIZE(code) ((code) & 0x18) 76 #define BPF_RVAL(code) ((code) & 0x18)
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/prebuilts/ndk/current/platforms/android-5/arch-arm/usr/include/linux/ |
filter.h | 45 #define BPF_SIZE(code) ((code) & 0x18) 76 #define BPF_RVAL(code) ((code) & 0x18)
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/prebuilts/ndk/current/platforms/android-8/arch-arm/usr/include/linux/ |
filter.h | 45 #define BPF_SIZE(code) ((code) & 0x18) 76 #define BPF_RVAL(code) ((code) & 0x18)
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/prebuilts/ndk/current/platforms/android-9/arch-arm/usr/include/linux/ |
filter.h | 45 #define BPF_SIZE(code) ((code) & 0x18) 76 #define BPF_RVAL(code) ((code) & 0x18)
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/prebuilts/ndk/current/platforms/android-9/arch-mips/usr/include/asm/ |
cacheops.h | 35 #define Hit_Writeback_I 0x18 64 #define Index_Load_Data_I 0x18
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/prebuilts/ndk/current/platforms/android-9/arch-mips/usr/include/linux/ |
filter.h | 45 #define BPF_SIZE(code) ((code) & 0x18) 76 #define BPF_RVAL(code) ((code) & 0x18)
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/prebuilts/ndk/current/platforms/android-9/arch-x86/usr/include/linux/ |
filter.h | 45 #define BPF_SIZE(code) ((code) & 0x18) 76 #define BPF_RVAL(code) ((code) & 0x18)
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-ifunc/ |
pr17154-i386.d | 16 [ ]*[a-f0-9]+: 68 18 00 00 00 push \$0x18 30 [ ]*[a-f0-9]+: ff a3 18 00 00 00 jmp \*0x18\(%ebx\)
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/external/llvm/test/MC/Disassembler/AArch64/ |
trace-regs.txt | 37 # CHECK: mrs x18, {{trcpdsr|TRCPDSR}} 49 # CHECK: mrs x18, {{trcdevid|TRCDEVID}} 92 0x18 0xd 0x31 0xd5 163 # CHECK: mrs x18, {{trcimspec5|TRCIMSPEC5}} 180 0x0 0x18 0x31 0xd5 192 0x18 0x1e 0x31 0xd5 212 0x21 0x18 0x31 0xd5 229 # CHECK: mrs x18, {{trcssccr0|TRCSSCCR0}} 244 0x57 0x18 0x31 0xd5 276 0x18 0x2e 0x31 0xd [all...] |
/external/sonivox/jet_tools/JetCreator/ |
img_splash.py | 21 \x82qZ\x93\xb2<\x85\x18\xb3d6\r\x95\x92!\xf61<\xfa\xff\xd7\xcd\x0cE\xac8{&\
30 \x0c\xf0\xc7\x92A&\x03\xdc\x91\x01\x9b\xdb\xfd\xdc\xcc\xfd\x18\x14-|\x07\xea\
44 \xed$\xe9\xf5\xf4*\xb4\x85\x00\xd0\x803?\x8c\x18\x88\x87\x9c\xd3\xe0\xf7Z\
53 \xb1\xe4\xf08\x9c\x8f\x9c\n\xc4\xe0\x9bd\x92\x9c\xb2O\xa5\x18,}\x84y\xf9\xfe\
57 \xf2\xc7\x91\xaa\x19\x08=\xf7\xd8\xb5\xfa\xb4\x18\xc4\xd1i\x19p9HLf\xa9>\xe0\
68 \x9dr\x17\xb3j\x87\xd6\x93C\xf7\xe3\x01\x94\x8ek+\xe9\xd9\xa3\xfd\x18\x19\
101 \xd4\xc0\x0ej\xa5\xd9\xbe\x1c\x1fB\t_\x17\x18\xab\xd1\xa1\xf0L\xf8\xdaK\\d\
105 \xf1\xcb\x10Q\n\x0c\x86\xc6i\xf7\xbe\xd8\xb4\xfb\x18?-\xf4\xf1a\x95=\xd1\x91\
115 \xed>\x9e\xbfG\x18\xcd\n\xdd\xfds%\x00\x91>/\xdf\r\x9f\xa6R\x06\x02\xde\xe8\
159 \x91MB\xd2\x03\x18\x1al\xc7\r=\x8dF\xff\xe4j\xeb{R\x82\x96<\x9f\x85E\xd0F\ [all...] |
/development/ndk/platforms/android-3/arch-arm/include/asm/arch/ |
gpio.h | 26 #define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
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/development/ndk/platforms/android-3/include/linux/ |
serio.h | 40 #define SERIO_WARRIOR 0x18
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/external/elfutils/tests/ |
run-readelf-gdb_index.sh | 72 CU offset: 0x18 78 CU list at offset 0x18 contains 2 entries: 103 CU offset: 0x18 109 CU list at offset 0x18 contains 2 entries:
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/external/expat/lib/ |
asciitab.h | 11 /* 0x18 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
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iasciitab.h | 12 /* 0x18 */ BT_NONXML, BT_NONXML, BT_NONXML, BT_NONXML,
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/external/iproute2/include/linux/ |
bpf_common.h | 16 #define BPF_SIZE(code) ((code) & 0x18)
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/external/iptables/extensions/ |
dscp_helper.c | 26 { "CS3", 0x18 },
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/external/kernel-headers/original/uapi/linux/ |
bpf_common.h | 16 #define BPF_SIZE(code) ((code) & 0x18)
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/external/llvm/test/CodeGen/AArch64/ |
arm64-patchpoint-scratch-regs.ll | 11 tail call void asm sideeffect "nop", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{x29},~{x30},~{x31}"() nounwind
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arm64-spill.ll | 12 call void asm sideeffect "; inlineasm", "~{q0},~{q1},~{q2},~{q3},~{q4},~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15},~{q16},~{q17},~{q18},~{q19},~{q20},~{q21},~{q22},~{q23},~{q24},~{q25},~{q26},~{q27},~{q28},~{q29},~{q30},~{q31},~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{fp},~{lr},~{sp},~{memory}"() nounwind
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/external/llvm/test/DebugInfo/ |
dwarfdump-objc.test | 27 CHECK: DW_AT_APPLE_property_attribute {{.*}} (0x18 (DW_APPLE_PROPERTY_readwrite, DW_APPLE_PROPERTY_retain))
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/external/llvm/test/MC/AArch64/ |
armv8.1a-lor.s | 30 // CHECK: msr LORSA_EL1, x0 // encoding: [0x00,0xa4,0x18,0xd5] 31 // CHECK: msr LOREA_EL1, x0 // encoding: [0x20,0xa4,0x18,0xd5] 32 // CHECK: msr LORN_EL1, x0 // encoding: [0x40,0xa4,0x18,0xd5] 33 // CHECK: msr LORC_EL1, x0 // encoding: [0x60,0xa4,0x18,0xd5]
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armv8.1a-pan.s | 11 // CHECK: msr PAN, x5 // encoding: [0x65,0x42,0x18,0xd5]
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/external/llvm/test/MC/Disassembler/X86/ |
intel-syntax-32.txt | 13 0x0f 0x01 0x18
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