| /external/libunwind/src/arm/ |
| offsets.h | 24 #define LINUX_SC_R5_OFF 0x20
|
| /external/libunwind/src/sh/ |
| offsets.h | 22 #define LINUX_SC_R7_OFF 0x20
|
| /external/llvm/lib/Support/ |
| Locale.cpp | 20 // except for the control characters (0x20 - 0x7E). In general one can not
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-stacksave.ll | 14 call void asm sideeffect "; inlineasm", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{fp},~{lr},~{sp},~{memory}"() nounwind
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| cf_end.ll | 5 ; EG: CF_END ; encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x80]
|
| /external/llvm/test/CodeGen/ARM/ |
| minsize-imms.ll | 6 ; CHECK: movs r0, #255 @ encoding: [0xff,0x20]
16 ; CHECK-V6M: movs [[TMP:r[0-7]]], #203 @ encoding: [0xcb,0x20]
26 ; CHECK: mov.w r0, #589824 @ encoding: [0x4f,0xf4,0x10,0x20]
29 ; CHECK-V6M: movs [[TMP:r[0-7]]], #9 @ encoding: [0x09,0x20]
|
| /external/llvm/test/MC/ARM/ |
| neont2-convert-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
37 @ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0xf6,0xff,0x20,0x07]
39 @ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0xf6,0xff,0x20,0x06]
|
| /external/llvm/test/MC/Disassembler/Mips/mips2/ |
| valid-mips2-el.txt | 3 0x85 0xc1 0x20 0x46 # CHECK: abs.d $f6, $f24
5 0x20 0xb8 0x45 0x02 # CHECK: add $23, $18, $5
34 0x38 0xf0 0x20 0x46 # CHECK: c.sf.d $f30, $f0
36 0xce 0xc2 0x20 0x46 # CHECK: ceil.w.d $f11, $f24
42 0xa0 0x46 0x20 0x46 # CHECK: cvt.s.d $f26, $f8
44 0x24 0x75 0x20 0x46 # CHECK: cvt.w.d $f20, $f14
51 0x8f 0x53 0x20 0x46 # CHECK: floor.w.d $f14, $f10
73 0x06 0x75 0x20 0x46 # CHECK: mov.d $f20, $f14
80 0x11 0x00 0x20 0x02 # CHECK: mthi $17
82 0x13 0x00 0x20 0x03 # CHECK: mtlo $2
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| valid-mips64r3-el.txt | 3 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14
5 0x20 0x48 0xc7 0x00 # CHECK: add $9, $6, $7
8 0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767
56 0x4a 0x18 0x20 0x46 # CHECK: ceil.l.d $f1, $f3
58 0x0e 0x73 0x20 0x46 # CHECK: ceil.w.d $f12, $f14
62 0x20 0x30 0xe6 0x70 # CHECK: clz $6, $7
67 0x25 0x73 0x20 0x46 # CHECK: cvt.l.d $f12, $f14
70 0x20 0x73 0x20 0x46 # CHECK: cvt.s.d $f12, $f14
72 0x24 0x73 0x20 0x46 # CHECK: cvt.w.d $f12, $f1
[all...] |
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| valid-mips64r5-el.txt | 3 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14
5 0x20 0x48 0xc7 0x00 # CHECK: add $9, $6, $7
8 0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767
56 0x4a 0x18 0x20 0x46 # CHECK: ceil.l.d $f1, $f3
58 0x0e 0x73 0x20 0x46 # CHECK: ceil.w.d $f12, $f14
62 0x20 0x30 0xe6 0x70 # CHECK: clz $6, $7
67 0x25 0x73 0x20 0x46 # CHECK: cvt.l.d $f12, $f14
70 0x20 0x73 0x20 0x46 # CHECK: cvt.s.d $f12, $f14
72 0x24 0x73 0x20 0x46 # CHECK: cvt.w.d $f12, $f1
[all...] |
| /external/llvm/test/MC/ELF/ |
| dot-symbol-assignment.s | 10 . = 0x20
|
| /external/llvm/test/MC/PowerPC/ |
| htm.s | 7 # CHECK-BE: tbegin. 1 # encoding: [0x7c,0x20,0x05,0x1d]
8 # CHECK-LE: tbegin. 1 # encoding: [0x1d,0x05,0x20,0x7c]
37 # CHECK-BE: tsr. 1 # encoding: [0x7c,0x20,0x05,0xdd]
38 # CHECK-LE: tsr. 1 # encoding: [0xdd,0x05,0x20,0x7c]
|
| /external/llvm/test/MC/Sparc/ |
| sparc-assembly-exprs.s | 5 ! CHECK: mov 60, %o2 ! encoding: [0x94,0x10,0x20,0x3c]
|
| sparc-synthetic-instructions.s | 30 ! CHECK: mov 1, %g1 ! encoding: [0x82,0x10,0x20,0x01]
62 ! CHECK: sub %g0, %g1, %g2 ! encoding: [0x84,0x20,0x00,0x01]
64 ! CHECK: sub %g0, %g1, %g1 ! encoding: [0x82,0x20,0x00,0x01]
76 ! CHECK: sub %g1, 1, %g1 ! encoding: [0x82,0x20,0x60,0x01]
78 ! CHECK: sub %g1, 55, %g1 ! encoding: [0x82,0x20,0x60,0x37]
108 ! CHECK: st %g0, [%g1+%g2] ! encoding: [0xc0,0x20,0x40,0x02]
126 ! CHECK: wr %g0, 5, %y ! encoding: [0x81,0x80,0x20,0x05]
130 ! CHECK: wr %g0, 5, %asr15 ! encoding: [0x9f,0x80,0x20,0x05]
134 ! CHECK: wr %g0, 5, %psr ! encoding: [0x81,0x88,0x20,0x05]
138 ! CHECK: wr %g0, 5, %wim ! encoding: [0x81,0x90,0x20,0x05
[all...] |
| /external/llvm/test/MC/X86/ |
| intel-syntax-x86-64-avx512f_vl.s | 60 // CHECK: encoding: [0x62,0x91,0xf5,0x20,0xc2,0xe3,0xab]
68 // CHECK: encoding: [0x62,0x91,0xf5,0x20,0xc2,0xe3,0x7b]
72 // CHECK: encoding: [0x62,0xf1,0xf5,0x20,0xc2,0x21,0x7b]
76 // CHECK: encoding: [0x62,0xb1,0xf5,0x20,0xc2,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]
84 // CHECK: encoding: [0x62,0xf1,0xf5,0x20,0xc2,0x62,0x7f,0x7b]
88 // CHECK: encoding: [0x62,0xf1,0xf5,0x20,0xc2,0xa2,0x00,0x10,0x00,0x00,0x7b]
92 // CHECK: encoding: [0x62,0xf1,0xf5,0x20,0xc2,0x62,0x80,0x7b]
96 // CHECK: encoding: [0x62,0xf1,0xf5,0x20,0xc2,0xa2,0xe0,0xef,0xff,0xff,0x7b]
172 // CHECK: encoding: [0x62,0xb1,0x64,0x20,0xc2,0xe2,0xab]
180 // CHECK: encoding: [0x62,0xb1,0x64,0x20,0xc2,0xe2,0x7b
[all...] |
| /external/ltrace/sysdeps/linux-gnu/sparc/ |
| arch.h | 21 #define BREAKPOINT_VALUE {0x91, 0xd0, 0x20, 0x01}
|
| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_dirty_flags.h | 13 #define U_NEW_FS_SAMPLER_STATES 0x20
|
| /external/pdfium/core/src/fpdfapi/fpdf_page/ |
| fpdf_page_parser_old_unittest.cpp | 38 EXPECT_EQ("\x1a\x20", parser.ReadHexString());
|
| /external/pdfium/xfa/src/fgas/include/ |
| fx_ucd.h | 13 #define FX_JAPCHARPROPERTYEX_Middle 0x20
|
| /external/webrtc/webrtc/modules/rtp_rtcp/source/ |
| fec_private_tables_bursty.h | 430 0xc9, 0x20
437 0x62, 0x20
445 0x85, 0x20
454 0x18, 0x20
464 0x30, 0x20
475 0x60, 0x20
487 0xc0, 0x20
500 0x80, 0x20
528 0xc9, 0x20,
535 0x62, 0x20,
[all...] |
| /packages/inputmethods/LatinIME/native/jni/src/dictionary/utils/ |
| byte_array_utils.cpp | 21 const uint8_t ByteArrayUtils::MINIMUM_ONE_BYTE_CHARACTER_VALUE = 0x20;
|
| /packages/inputmethods/LatinIME/native/jni/tests/dictionary/utils/ |
| byte_array_utils_test.cpp | 77 EXPECT_EQ(0x20, ByteArrayUtils::readCodePoint(buffer, 3));
86 EXPECT_EQ(0x20, codePointArray[1]);
94 const int codePointArray[] = { 0x10FF00, 0x20, 0x41 };
99 EXPECT_EQ(0x20, ByteArrayUtils::readCodePoint(buffer, 3));
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/linux/ |
| matroxfb.h | 40 #define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32)
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/linux/netfilter_ipv4/ |
| ipt_ECN.h | 17 #define IPT_ECN_OP_SET_CWR 0x20 /* set CWR bit of TCP header */
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/linux/netfilter_ipv6/ |
| ip6t_rt.h | 25 #define IP6T_RT_FST_NSTRICT 0x20
|
