| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| attr-none-o32-fpxx.d | 9 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
17 FP ABI: Hard float \(32-bit CPU, Any FPU\)
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| break20.s | 1 # Source file used to test the 20-bit break instructions
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| elf_arch_mips32r6.d | 15 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
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| elf_arch_mips64r6.d | 15 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
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| module-mfpxx.d | 7 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
15 FP ABI: Hard float \(32-bit CPU, Any FPU\)
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| module-set-mfpxx.d | 7 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
15 FP ABI: Hard float \(32-bit CPU, Any FPU\)
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| trap20.s | 1 # Source file used to test the 20-bit trap instructions
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/ |
| greg9.s | 2 % A bit cheesy: we allocate anonymous GREGs with no handle. This isn't
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| reloc8.s | 1 # Simple relocations against 8-bit extern symbols.
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| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-cris/ |
| noov.d | 7 # want 32-bit-wrapping on a 32-bit target for the benefit of Linux
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| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-h8300/ |
| relax-4.s | 1 ; Relaxation is possible for following bit manipulation instructions
6 # s3-s6 aren't valid 16-bit addresses.
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| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-m68hc11/ |
| xgate-offset.s | 1 ;;; Test 16bit relocate with --xgate-ramoffset
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| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
| attr-gnu-4-05.d | 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
16 FP ABI: Hard float \(32-bit CPU, Any FPU\)
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| attr-gnu-4-44.d | 8 Tag_GNU_MIPS_ABI_FP: Hard float \(MIPS32r2 64-bit FPU 12 callee-saved\)
16 FP ABI: Hard float \(MIPS32r2 64-bit FPU 12 callee-saved\)
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| attr-gnu-4-55.d | 8 Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
16 FP ABI: Hard float \(32-bit CPU, Any FPU\)
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| attr-gnu-4-6-ph.d | 19 FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
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| attr-gnu-4-7-ph.d | 19 FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
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| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-size/ |
| size32-1.s | 1 # 32-bit size relocation in shared object
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| /external/libvpx/libvpx/test/ |
| vp8_boolcoder_test.cc | 84 int bit = (bit_method == 0) ? 0 : (bit_method == 1) ? 1 : 0; local
87 bit = (i & 1);
89 bit = bit_rnd(2);
91 vp8_encode_bool(&bw, bit, static_cast<int>(probas[i]));
104 bit = (i & 1);
106 bit = bit_rnd(2);
108 GTEST_ASSERT_EQ(vp8dx_decode_bool(&br, probas[i]), bit)
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| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/test/ |
| vp8_boolcoder_test.cc | 84 int bit = (bit_method == 0) ? 0 : (bit_method == 1) ? 1 : 0; local
87 bit = (i & 1);
89 bit = bit_rnd(2);
91 vp8_encode_bool(&bw, bit, static_cast<int>(probas[i]));
108 bit = (i & 1);
110 bit = bit_rnd(2);
112 GTEST_ASSERT_EQ(vp8dx_decode_bool(&br, probas[i]), bit)
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68hc11/ |
| insns12.s | 7 call _foo ; 24-bit reloc
8 call _foo,1 ; 16-bit reloc, immediate page specification
9 call _foo,%page(foo_page) ; 16-bit reloc and 8-bit page reloc
10 call 0,x,3 ; 8-bit page reloc
13 call 12,x,%page(foo_page) ; 8-bit page reloc
19 call [_foo,x] ; 16-bit reloc
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| /external/blktrace/ |
| blkparse.c | 225 struct blk_io_trace *bit; member in struct:trace
573 static void handle_notify(struct blk_io_trace *bit)
575 void *payload = (caddr_t) bit + sizeof(*bit);
578 switch (bit->action) {
580 add_ppm_hash(bit->pid, payload);
584 if (bit->pdu_len != sizeof(two32))
591 start_timestamp = bit->time;
602 if (bit->pdu_len > 0) {
603 char msg[bit->pdu_len+1]
766 struct blk_io_trace *bit = bit_alloc_list; local
1917 struct blk_io_trace *bit = t->bit; local
1992 struct blk_io_trace *bit = t->bit; local
2043 struct blk_io_trace *bit; local
2160 struct blk_io_trace *bit; local
2318 struct blk_io_trace *bit = NULL; local
2457 struct blk_io_trace *bit; local
[all...] |
| /art/runtime/interpreter/mterp/x86/ |
| bindiv.S | 3 * 32-bit binary div/rem operation. Handles special case of op0=minint and
17 # than 8-bit and +ve
18 jz .L${opcode}_8 # Do 8-bit divide
20 # than 16-bit and +ve
21 jz .L${opcode}_16 # Do 16-bit divide
33 div %cl # 8-bit divide otherwise.
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| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/ |
| wctype.h | 58 endian). We define the bit value interpretations here dependent on the
63 # define _ISwbit(bit) (1 << (bit))
65 # define _ISwbit(bit) \
66 ((bit) < 8 ? (int) ((1UL << (bit)) << 24) \
67 : ((bit) < 16 ? (int) ((1UL << (bit)) << 8) \
68 : ((bit) < 24 ? (int) ((1UL << (bit)) >> 8)
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/ |
| wctype.h | 58 endian). We define the bit value interpretations here dependent on the
63 # define _ISwbit(bit) (1 << (bit))
65 # define _ISwbit(bit) \
66 ((bit) < 8 ? (int) ((1UL << (bit)) << 24) \
67 : ((bit) < 16 ? (int) ((1UL << (bit)) << 8) \
68 : ((bit) < 24 ? (int) ((1UL << (bit)) >> 8)
[all...] |
