| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/ |
| emulu.d | 19 32: fd 7c 70 ff ff 7f emulu #0x7fffff, r0
20 38: fd 7c 7e ff ff 7f emulu #0x7fffff, r14
23 4c: fd 70 70 ff ff ff 7f emulu #0x7fffffff, r0
24 53: fd 70 7e ff ff ff 7f emulu #0x7fffffff, r1
[all...] |
| rotl.d | 12 9: fd 6f ff rotl #31, r15
16 15: fd 66 ff rotl r15, r15
|
| rotr.d | 12 9: fd 6d ff rotr #31, r15
16 15: fd 64 ff rotr r15, r15
|
| movu.d | 28 26: 5b ff movu\.b r15, r15
32 2e: 5f ff movu\.w r15, r15
36 36: 58 ff movu\.b \[r15\], r15
40 41: 59 ff fc movu\.b 252\[r15\], r15
41 44: 5a 00 fc ff movu\.b 65532\[r0\], r0
42 48: 5a 0f fc ff movu\.b 65532\[r0\], r15
43 4c: 5a f0 fc ff movu\.b 65532\[r15\], r0
44 50: 5a ff fc ff movu\.b 65532\[r15\], r15
48 5a: 5c ff movu\.w \[r15\], r1
[all...] |
| /external/tcpdump/ |
| print-ntp.c | 330 register float ff; local
334 ff = f / 65536.0; /* shift radix point by 16 bits */
335 f = ff * 1000000.0; /* Treat fraction as parts per million */
348 register float ff; local
352 ff = uf;
353 if (ff < 0.0) /* some compilers are buggy */
354 ff += FMAXINT;
355 ff = ff / FMAXINT; /* shift radix point by 32 bits */
356 f = ff * 1000000000.0; /* treat fraction as parts per billion *
385 register float ff; local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| loadb_test.d | 11 4: 10 88 ff 00 loadb 0xff <main\+0xff>:m,r1
12 8: 30 88 ff 0f loadb 0xfff <main\+0xfff>:m,r3
19 20: 2f 88 ff ff loadb 0xfffff <main\+0xfffff>:m,r2
22 2c: 10 8a ff 00 loadb \[r12\]0xff:m,r1
23 30: 10 8b ff 00 loadb \[r12\]0xff:m,r1
24 34: 30 8a ff 0f loadb \[r12\]0xfff:m,r3
25 38: 30 8b ff 0f loadb \[r12\]0xfff:m,r3
39 6a: fc ff
41 70: fc ff
[all...] |
| loadw_test.d | 11 4: 10 89 ff 00 loadw 0xff <main\+0xff>:m,r1
12 8: 30 89 ff 0f loadw 0xfff <main\+0xfff>:m,r3
19 20: 2f 89 ff ff loadw 0xfffff <main\+0xfffff>:m,r2
22 2c: 10 8e ff 00 loadw \[r12\]0xff:m,r1
23 30: 10 8f ff 00 loadw \[r12\]0xff:m,r1
24 34: 30 8e ff 0f loadw \[r12\]0xfff:m,r3
25 38: 30 8f ff 0f loadw \[r12\]0xfff:m,r3
39 6a: fc ff
41 70: fc ff
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| bitfield-no-aliases.d | 34 64: 530100ff ubfm wzr, w7, #1, #0
38 74: 130000ff sbfm wzr, w7, #0, #0
41 80: 131000ff sbfm wzr, w7, #16, #0
44 8c: 130100ff sbfm wzr, w7, #1, #0
45 90: 934000ff sbfm xzr, x7, #0, #0
48 9c: 936000ff sbfm xzr, x7, #32, #0
51 a8: 934100ff sbfm xzr, x7, #1, #0
52 ac: 130000ff sbfm wzr, w7, #0, #0
55 b8: 131040ff sbfm wzr, w7, #16, #16
59 c8: 934000ff sbfm xzr, x7, #0, #
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| x86-64-avx512dq_vl.d | 19 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 1a b2 f0 f7 ff ff[ ]*vbroadcastf64x2 -0x810\(%rdx\),%ymm30
27 [ ]*[a-f0-9]+:[ ]*62 62 fd 28 5a b2 f0 f7 ff ff[ ]*vbroadcasti64x2 -0x810\(%rdx\),%ymm30
36 [ ]*[a-f0-9]+:[ ]*62 62 7d 28 19 b2 f8 fb ff ff[ ]*vbroadcastf32x2 -0x408\(%rdx\),%ymm30
46 [ ]*[a-f0-9]+:[ ]*62 61 fd 08 7b b2 f0 f7 ff ff[ ]*vcvtpd2qq -0x810\(%rdx\),%xmm30
50 [ ]*[a-f0-9]+:[ ]*62 61 fd 18 7b b2 f8 fb ff ff[ ]*vcvtpd2qq -0x408\(%rdx\)\{1to2\},%xmm3
[all...] |
| avx512bw_vl-opts-intel.d | 28 [ ]*[a-f0-9]+:[ ]*62 f1 ff 0f 6f f5[ ]*vmovdqu16 xmm6\{k7\},xmm5
29 [ ]*[a-f0-9]+:[ ]*62 f1 ff 0f 7f ee[ ]*vmovdqu16\.s xmm6\{k7\},xmm5
30 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 6f f5[ ]*vmovdqu16 xmm6\{k7\}\{z\},xmm5
31 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 7f ee[ ]*vmovdqu16\.s xmm6\{k7\}\{z\},xmm5
32 [ ]*[a-f0-9]+:[ ]*62 f1 ff 0f 6f f5[ ]*vmovdqu16 xmm6\{k7\},xmm5
33 [ ]*[a-f0-9]+:[ ]*62 f1 ff 0f 7f ee[ ]*vmovdqu16\.s xmm6\{k7\},xmm5
34 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 6f f5[ ]*vmovdqu16 xmm6\{k7\}\{z\},xmm5
35 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 7f ee[ ]*vmovdqu16\.s xmm6\{k7\}\{z\},xmm5
36 [ ]*[a-f0-9]+:[ ]*62 f1 ff 2f 6f f5[ ]*vmovdqu16 ymm6\{k7\},ymm5
37 [ ]*[a-f0-9]+:[ ]*62 f1 ff 2f 7f ee[ ]*vmovdqu16\.s ymm6\{k7\},ymm
[all...] |
| avx512bw_vl-opts.d | 28 [ ]*[a-f0-9]+:[ ]*62 f1 ff 0f 6f f5[ ]*vmovdqu16 %xmm5,%xmm6\{%k7\}
29 [ ]*[a-f0-9]+:[ ]*62 f1 ff 0f 7f ee[ ]*vmovdqu16\.s %xmm5,%xmm6\{%k7\}
30 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 6f f5[ ]*vmovdqu16 %xmm5,%xmm6\{%k7\}\{z\}
31 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 7f ee[ ]*vmovdqu16\.s %xmm5,%xmm6\{%k7\}\{z\}
32 [ ]*[a-f0-9]+:[ ]*62 f1 ff 0f 6f f5[ ]*vmovdqu16 %xmm5,%xmm6\{%k7\}
33 [ ]*[a-f0-9]+:[ ]*62 f1 ff 0f 7f ee[ ]*vmovdqu16\.s %xmm5,%xmm6\{%k7\}
34 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 6f f5[ ]*vmovdqu16 %xmm5,%xmm6\{%k7\}\{z\}
35 [ ]*[a-f0-9]+:[ ]*62 f1 ff 8f 7f ee[ ]*vmovdqu16\.s %xmm5,%xmm6\{%k7\}\{z\}
36 [ ]*[a-f0-9]+:[ ]*62 f1 ff 2f 6f f5[ ]*vmovdqu16 %ymm5,%ymm6\{%k7\}
37 [ ]*[a-f0-9]+:[ ]*62 f1 ff 2f 7f ee[ ]*vmovdqu16\.s %ymm5,%ymm6\{%k7\
[all...] |
| clflushopt.d | 13 [ ]*[a-f0-9]+:[ ]*66 0f ae bc f4 c0 1d fe ff[ ]*clflushopt -0x1e240\(%esp,%esi,8\)
15 [ ]*[a-f0-9]+:[ ]*66 0f ae bc f4 c0 1d fe ff[ ]*clflushopt -0x1e240\(%esp,%esi,8\)
|
| clwb.d | 13 [ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\)
15 [ ]*[a-f0-9]+:[ ]*66 0f ae b4 f4 c0 1d fe ff[ ]*clwb -0x1e240\(%esp,%esi,8\)
|
| prefetchwt1.d | 12 [ ]*[a-f0-9]+: 0f 0d 94 f4 c0 1d fe ff prefetchwt1 -0x1e240\(%esp,%esi,8\)
14 [ ]*[a-f0-9]+: 0f 0d 94 f4 c0 1d fe ff prefetchwt1 -0x1e240\(%esp,%esi,8\)
|
| xsavec-intel.d | 13 [ ]*[a-f0-9]+:[ ]*0f c7 a4 f4 c0 1d fe ff[ ]*xsavec \[esp\+esi\*8-0x1e240\]
15 [ ]*[a-f0-9]+:[ ]*0f c7 a4 f4 c0 1d fe ff[ ]*xsavec \[esp\+esi\*8-0x1e240\]
|
| xsavec.d | 13 [ ]*[a-f0-9]+:[ ]*0f c7 a4 f4 c0 1d fe ff[ ]*xsavec -0x1e240\(%esp,%esi,8\)
15 [ ]*[a-f0-9]+:[ ]*0f c7 a4 f4 c0 1d fe ff[ ]*xsavec -0x1e240\(%esp,%esi,8\)
|
| avx512dq_vl.d | 14 [ ]*[a-f0-9]+:[ ]*62 f2 fd 2f 1a b4 f4 c0 1d fe ff[ ]*vbroadcastf64x2 -0x1e240\(%esp,%esi,8\),%ymm6\{%k7\}
18 [ ]*[a-f0-9]+:[ ]*62 f2 fd 2f 1a b2 f0 f7 ff ff[ ]*vbroadcastf64x2 -0x810\(%edx\),%ymm6\{%k7\}
21 [ ]*[a-f0-9]+:[ ]*62 f2 fd 2f 5a b4 f4 c0 1d fe ff[ ]*vbroadcasti64x2 -0x1e240\(%esp,%esi,8\),%ymm6\{%k7\}
25 [ ]*[a-f0-9]+:[ ]*62 f2 fd 2f 5a b2 f0 f7 ff ff[ ]*vbroadcasti64x2 -0x810\(%edx\),%ymm6\{%k7\}
29 [ ]*[a-f0-9]+:[ ]*62 f2 7d 2f 19 b4 f4 c0 1d fe ff[ ]*vbroadcastf32x2 -0x1e240\(%esp,%esi,8\),%ymm6\{%k7\}
33 [ ]*[a-f0-9]+:[ ]*62 f2 7d 2f 19 b2 f8 fb ff ff[ ]*vbroadcastf32x2 -0x408\(%edx\),%ymm6\{%k7\}
37 [ ]*[a-f0-9]+:[ ]*62 f1 fd 0f 7b b4 f4 c0 1d fe ff[ ]*vcvtpd2qq -0x1e240\(%esp,%esi,8\),%xmm6\{%k7\
[all...] |
| /art/test/005-annotations/src/android/test/anno/ |
| AnnoArrayField.java | 15 float[] ff() default {3.141592654f};
|
| /external/clang/test/CXX/drs/ |
| dr7xx.cpp | 10 void ff() { f(); } function in namespace:dr777
|
| /prebuilts/misc/common/swig/include/2.0.11/allegrocl/ |
| longlongs.i | 42 (ff:foreign-pointer)
47 (ff:foreign-pointer)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| dv-branch.d | 15 1c: f0 ff ff 48 \(p06\) br\.cond\.sptk\.few 0x0;;
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68k/ |
| movem-offset.d | 12 c: 4cee 03ff ffe8 moveml %fp@\(-24\),%d0-%a1
13 12: 48ee 03ff 0010 moveml %d0-%a1,%fp@\(16\)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sparc/ |
| prefetch.d | 11 4: ff 68 40 00 prefetch \[ %g1 \], 31
17 1c: ff e8 60 00 prefetcha \[ %g1 \] %asi, 31
|
| /external/valgrind/none/tests/s390x/ |
| and.c | 18 niysweep(ff);
30 immsweep(nihh, 00ff);
31 immsweep(nihl, 00ff);
32 immsweep(nilh, 00ff);
33 immsweep(nill, 00ff);
|
| or.c | 18 oiysweep(ff);
30 immsweep(oihh, 00ff);
31 immsweep(oihl, 00ff);
32 immsweep(oilh, 00ff);
33 immsweep(oill, 00ff);
|
