| /external/libopus/celt/arm/ |
| celt_pitch_xcorr_arm.s | 54 ; r12 = int j
63 SUBS r12, r3, #8
83 SUBS r12, r12, #8
103 ADDS r12, r12, #4
109 SUB r12, r12, #4
121 ADDS r12, r12, #
[all...] |
| /external/tremolo/Tremolo/ |
| mdctARM.s | 63 LDMDB r2!,{r5,r6,r7,r12}
68 MOV r12,r12,ASR #9 @ r12= (*--r)>>9
70 MOV r14,r12,ASR #15
72 EORNE r12,r4, r14,ASR #31
73 STRH r12,[r0], r3
123 LDR r12,[r2],#8
128 RSB r12,r12,#
[all...] |
| /external/webrtc/webrtc/common_audio/signal_processing/ |
| complex_bit_reverse_arm.S | 41 rsb r12, r4, r6 @ l > nn - mr
46 cmp r2, r12
49 sub r12, r2, #1
50 and r4, r12, r4
55 mov r12, r4, asl #2
58 ldr r2, [r0, r12] @ complex_data[2 * mr, 2 * mr + 1].
59 str r7, [r0, r12]
77 ldr r12, [r0, r5] @ complex_data[index[m + 1], index[m + 1] + 1]
80 str r12, [r0, r2]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| loadb_test.s | 18 loadb [r12]0x0,r0
20 loadb [r12]0xff,r1
22 loadb [r12]0xfff,r3
24 loadb [r12]0x1234,r4
26 loadb [r12]0x1234,r5
28 loadb [r12]0x4567,r2
63 loadb [r12]0x0(r1,r0),r0
65 loadb [r12]0x1234(r1,r0),r2
70 loadb [r12]0xA1234(r1,r0),r4
|
| loadd_test.s | 18 loadd [r12]0x0,(r1,r0)
20 loadd [r12]0xff,(r1,r0)
22 loadd [r12]0xfff,(r3,r2)
24 loadd [r12]0x1234,(r4,r3)
26 loadd [r12]0x1234,(r5,r4)
28 loadd [r12]0x4567,(r2,r1)
63 loadd [r12]0x0(r1,r0),(r1,r0)
65 loadd [r12]0x1234(r1,r0),(r2,r1)
70 loadd [r12]0xA1234(r1,r0),(r3,r2)
|
| loadw_test.s | 18 loadw [r12]0x0,r0
20 loadw [r12]0xff,r1
22 loadw [r12]0xfff,r3
24 loadw [r12]0x1234,r4
26 loadw [r12]0x1234,r5
28 loadw [r12]0x4567,r2
63 loadw [r12]0x0(r1,r0),r0
65 loadw [r12]0x1234(r1,r0),r2
70 loadw [r12]0xA1234(r1,r0),r4
|
| stord_test.s | 18 stord (r1,r0),[r12]0x0
20 stord (r1,r0),[r12]0xff
22 stord (r3,r2),[r12]0xfff
24 stord (r4,r3),[r12]0x1234
26 stord (r5,r4),[r12]0x1234
28 stord (r2,r1),[r12]0x4567
63 stord (r1,r0),[r12]0x0(r1,r0)
65 stord (r2,r1),[r12]0x1234(r1,r0)
70 stord (r3,r2),[r12]0xA1234(r1,r0)
|
| storb_test.d | 21 26: 00 ca 00 00 storb r0,\[r12\]0x0:m
22 2a: 00 cb 00 00 storb r0,\[r12\]0x0:m
23 2e: 10 ca ff 00 storb r1,\[r12\]0xff:m
24 32: 10 cb ff 00 storb r1,\[r12\]0xff:m
25 36: 30 ca ff 0f storb r3,\[r12\]0xfff:m
26 3a: 30 cb ff 0f storb r3,\[r12\]0xfff:m
31 4e: 20 ca 67 45 storb r2,\[r12\]0x4567:m
32 52: 2a cb 34 12 storb r2,\[r12\]0xa1234:m
70 c8: 00 fe storb r0,\[r12\]0x0:s\(r1,r0\)
72 cc: 70 c6 04 12 storb r7,\[r12\]0x234:m\(r1,r0\
[all...] |
| storw_test.d | 21 26: 00 ce 00 00 storw r0,\[r12\]0x0:m
22 2a: 00 cf 00 00 storw r0,\[r12\]0x0:m
23 2e: 10 ce ff 00 storw r1,\[r12\]0xff:m
24 32: 10 cf ff 00 storw r1,\[r12\]0xff:m
25 36: 30 ce ff 0f storw r3,\[r12\]0xfff:m
26 3a: 30 cf ff 0f storw r3,\[r12\]0xfff:m
31 4e: 20 ce 67 45 storw r2,\[r12\]0x4567:m
32 52: 2a cf 34 12 storw r2,\[r12\]0xa1234:m
70 c8: 00 de storw r0,\[r12\]0x0:s\(r1,r0\)
72 cc: f0 c6 04 12 storw r15,\[r12\]0x234:m\(r1,r0\
[all...] |
| cbitb_test.d | 14 e: 50 68 14 00 cbitb \$0x5,\[r12\]0x14:m
16 16: 30 68 34 12 cbitb \$0x3,\[r12\]0x1234:m
18 1e: 30 68 34 00 cbitb \$0x3,\[r12\]0x34:m
19 22: b0 6a 3a 4a cbitb \$0x3,\[r12\]0xa7a:m\(r1,r0\)
20 26: b1 6a 3a 4a cbitb \$0x3,\[r12\]0xa7a:m\(r3,r2\)
21 2a: b6 6a 3a 4a cbitb \$0x3,\[r12\]0xa7a:m\(r4,r3\)
22 2e: b2 6a 3a 4a cbitb \$0x3,\[r12\]0xa7a:m\(r5,r4\)
23 32: b7 6a 3a 4a cbitb \$0x3,\[r12\]0xa7a:m\(r6,r5\)
24 36: b3 6a 3a 4a cbitb \$0x3,\[r12\]0xa7a:m\(r7,r6\)
25 3a: b4 6a 3a 4a cbitb \$0x3,\[r12\]0xa7a:m\(r9,r8\
[all...] |
| sbitb_test.d | 14 e: 50 70 14 00 sbitb \$0x5,\[r12\]0x14:m
16 16: 30 70 34 12 sbitb \$0x3,\[r12\]0x1234:m
18 1e: 30 70 34 00 sbitb \$0x3,\[r12\]0x34:m
19 22: b0 72 3a 4a sbitb \$0x3,\[r12\]0xa7a:m\(r1,r0\)
20 26: b1 72 3a 4a sbitb \$0x3,\[r12\]0xa7a:m\(r3,r2\)
21 2a: b6 72 3a 4a sbitb \$0x3,\[r12\]0xa7a:m\(r4,r3\)
22 2e: b2 72 3a 4a sbitb \$0x3,\[r12\]0xa7a:m\(r5,r4\)
23 32: b7 72 3a 4a sbitb \$0x3,\[r12\]0xa7a:m\(r6,r5\)
24 36: b3 72 3a 4a sbitb \$0x3,\[r12\]0xa7a:m\(r7,r6\)
25 3a: b4 72 3a 4a sbitb \$0x3,\[r12\]0xa7a:m\(r9,r8\
[all...] |
| tbitb_test.d | 14 e: 50 78 14 00 tbitb \$0x5,\[r12\]0x14:m
16 16: 30 78 34 12 tbitb \$0x3,\[r12\]0x1234:m
18 1e: 30 78 34 00 tbitb \$0x3,\[r12\]0x34:m
19 22: b0 7a 3a 4a tbitb \$0x3,\[r12\]0xa7a:m\(r1,r0\)
20 26: b1 7a 3a 4a tbitb \$0x3,\[r12\]0xa7a:m\(r3,r2\)
21 2a: b6 7a 3a 4a tbitb \$0x3,\[r12\]0xa7a:m\(r4,r3\)
22 2e: b2 7a 3a 4a tbitb \$0x3,\[r12\]0xa7a:m\(r5,r4\)
23 32: b7 7a 3a 4a tbitb \$0x3,\[r12\]0xa7a:m\(r6,r5\)
24 36: b3 7a 3a 4a tbitb \$0x3,\[r12\]0xa7a:m\(r7,r6\)
25 3a: b4 7a 3a 4a tbitb \$0x3,\[r12\]0xa7a:m\(r9,r8\
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_inter_pred_luma_copy.s | 72 @ r12 => wd
85 stmfd sp!, {r4-r12, r14} @stack stores the values of the arguments
86 ldr r12,[sp,#48] @loads wd
90 tst r12,#15 @checks wd for multiples for 4 & 8
92 tst r12,#7 @checks wd for multiples for 4 & 8
94 sub r11,r12,#4
97 subs r4,r12,#0 @checks wd == 0
124 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
128 sub r11,r12,#8
131 subs r4,r12,#0 @checks w
[all...] |
| ihevc_inter_pred_chroma_copy.s | 106 stmfd sp!, {r4-r12, r14} @stack stores the values of the arguments
107 ldr r12,[sp,#48] @loads wd
108 lsl r12,r12,#1
114 tst r12,#15 @checks wd for multiples for 4 & 8
116 tst r12,#7 @checks wd for multiples for 4 & 8
119 sub r11,r12,#4
124 subs r4,r12,#0 @checks wd == 0
152 ldmfd sp!,{r4-r12,r15} @reload the registers from sp
156 subs r4,r12,#0 @checks wd ==
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.S | 30 PUSH {r4-r12,lr}
96 ADD r12,r10,r1
101 VST1.8 {d29[1]},[r12],lr
103 VST1.8 {d29[3]},[r12],lr
105 VST1.8 {d29[5]},[r12],lr
107 VST1.8 {d29[7]},[r12],lr
108 ADD r12,r0,#4
109 ADD r10,r12,r1
110 VST1.8 {d24[0]},[r12],lr
112 VST1.8 {d24[2]},[r12],l
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-s390/ |
| tlsbinpic_64.s | 75 larl %r12,_GLOBAL_OFFSET_TABLE_
84 lg %r12,.LC2-.LT1(%r13)
129 lg %r3,0(%r3,%r12):tls_load:sG2
134 lg %r4,0(%r3,%r12):tls_load:sg1
139 lg %r4,0(%r3,%r12):tls_load:sl2
144 lg %r4,0(%r3,%r12):tls_load:sh1
149 lg %r3,0(%r3,%r12):tls_load:sG3
154 lg %r4,0(%r3,%r12):tls_load:sg3
159 lg %r4,0(%r3,%r12):tls_load:sl3
164 lg %r4,0(%r3,%r12):tls_load:sh
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| copymem8x4_v6.asm | 39 mov r12, #4
48 subs r12, r12, #1
83 mov r12, #4
86 subs r12, r12, #1
108 mov r12, #4
115 subs r12, r12, #1
|
| copymem8x8_v6.asm | 39 mov r12, #8
48 subs r12, r12, #1
83 mov r12, #8
86 subs r12, r12, #1
108 mov r12, #8
115 subs r12, r12, #1
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| copymem8x4_v6.asm | 39 mov r12, #4
48 subs r12, r12, #1
83 mov r12, #4
86 subs r12, r12, #1
108 mov r12, #4
115 subs r12, r12, #1
|
| copymem8x8_v6.asm | 39 mov r12, #8
48 subs r12, r12, #1
83 mov r12, #8
86 subs r12, r12, #1
108 mov r12, #8
115 subs r12, r12, #1
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| binop.d | 388 [ ]+730:[ ]+4205 @IM+0c5e@[ ]+@OC@\.b \[\$?r12=\$?r2\+\$?r0\.b\],\$?r5
389 [ ]+734:[ ]+4255 @IM+1cde@[ ]+@OC@\.w \[\$?r12=\$?r2\+\$?r5\.b\],\$?r13
390 [ ]+738:[ ]+42a5 @IM+2c1e@[ ]+@OC@\.d \[\$?r12=\$?r2\+\$?r10\.b\],\$?r1
391 [ ]+73c:[ ]+4029 @IM+0c5e@[ ]+@OC@\.b \[\$?r12=\$?r2\+\[\$?r0\]\.b\],\$?r5
392 [ ]+740:[ ]+4529 @IM+1cde@[ ]+@OC@\.w \[\$?r12=\$?r2\+\[\$?r5\]\.b\],\$?r13
393 [ ]+744:[ ]+4a29 @IM+2c1e@[ ]+@OC@\.d \[\$?r12=\$?r2\+\[\$?r10\]\.b\],\$?r1
394 [ ]+748:[ ]+402d @IM+0c5e@[ ]+@OC@\.b \[\$?r12=\$?r2\+\[\$?r0\+\]\.b\],\$?r5
395 [ ]+74c:[ ]+452d @IM+1cde@[ ]+@OC@\.w \[\$?r12=\$?r2\+\[\$?r5\+\]\.b\],\$?r13
396 [ ]+750:[ ]+4a2d @IM+2c1e@[ ]+@OC@\.d \[\$?r12=\$?r2\+\[\$?r10\+\]\.b\],\$?r1
397 [ ]+754:[ ]+452d @IM+1cde@[ ]+@OC@\.w \[\$?r12=\$?r2\+\[\$?r5\+\]\.b\],\$?r1
[all...] |
| /external/boringssl/linux-arm/crypto/bn/ |
| armv4-mont.S | 45 stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr} @ save 10 registers
64 mov r12,#0
65 umlal r10,r12,r6,r8 @ np[0]*n0+"t[0]"
75 umlal r12,r14,r6,r8 @ np[j]*n0
76 adds r12,r12,r10
77 str r12,[r4],#4 @ tp[j-1]=,tp++
78 adc r12,r14,#0
82 adds r12,r12,r1
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumb-shift-encoding.s | 7 sbc.w r12, lr, r0
13 sbc.w r6, r3, r12, asr #16
14 sbc.w r7, r2, r12, rrx
17 @ CHECK: sbc.w r12, lr, r0 @ encoding: [0x6e,0xeb,0x00,0x0c]
23 @ CHECK: sbc.w r6, r3, r12, asr #16 @ encoding: [0x63,0xeb,0x2c,0x46]
24 @ CHECK: sbc.w r7, r2, r12, rrx @ encoding: [0x62,0xeb,0x3c,0x07]
27 and.w r12, lr, r0
33 and.w r6, r3, r12, asr #16
34 and.w r7, r2, r12, rrx
37 @ CHECK: and.w r12, lr, r0 @ encoding: [0x0e,0xea,0x00,0x0c
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| x86-64-sib.d | 34 [ ]*[a-f0-9]+: 41 8b 04 24 mov \(%r12\),%eax
35 [ ]*[a-f0-9]+: 41 8b 04 24 mov \(%r12\),%eax
36 [ ]*[a-f0-9]+: 41 8b 04 24 mov \(%r12\),%eax
37 [ ]*[a-f0-9]+: 41 8b 04 64 mov \(%r12,%riz,2\),%eax
38 [ ]*[a-f0-9]+: 41 8b 04 a4 mov \(%r12,%riz,4\),%eax
39 [ ]*[a-f0-9]+: 41 8b 04 e4 mov \(%r12,%riz,8\),%eax
59 [ ]*[a-f0-9]+: 41 8b 04 24 mov \(%r12\),%eax
60 [ ]*[a-f0-9]+: 41 8b 04 24 mov \(%r12\),%eax
61 [ ]*[a-f0-9]+: 41 8b 04 24 mov \(%r12\),%eax
62 [ ]*[a-f0-9]+: 41 8b 04 64 mov \(%r12,%riz,2\),%ea
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/ |
| tlsd.s | 13 mov.l r12,@-r15
17 mov.l .L3,r12
18 add r0,r12
27 add r12,r4
41 add r12,r4
66 mov.l @r15+,r12
|
