/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
armVCM4P10_Average_4x_Align_unsafe_s.s | 143 ORR iPredA0, iPredA0, Temp1, LSL #16 145 ORR iPredA1, iPredA1, Temp2, LSL #16 165 ORR iPredA0, iPredA0, Temp1, LSL #16 167 ORR iPredA1, iPredA1, Temp2, LSL #16 199 ORR iPredA0, iPredA0, Temp1, LSL #8 201 ORR iPredA1, iPredA1, Temp2, LSL #8 220 ORR iPredA0, iPredA0, Temp1, LSL #8 222 ORR iPredA1, iPredA1, Temp2, LSL #8
|
armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.s | 105 ORR ValueA1, Temp3, Temp4, LSL #8 106 ORR ValueA0, Temp1, Temp2, LSL #8 145 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0] 146 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0] 148 PKHBT Temp1, ValueA0, ValueA1, LSL #16 ;// [d0 c0 b0 a0] 173 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0] 174 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0] 176 PKHBT Temp1, ValueA0, ValueA1, LSL #16 ;// [d0 c0 b0 a0]
|
armVCM4P10_UnpackBlock4x4_s.s | 89 AND strOffset, cstOffset, Flag, LSL #1 ;// strOffset = (Flag & 15) < 1; 91 ORRNE Value,Value,Value2, LSL #8 ;// Value = (OMX_U16) *pSrc++
|
omxVCM4P10_PredictIntraChroma_8x8_s.s | 148 LDR pc, [pTable, predMode, LSL #2] ;// Branch to the case based on preMode 401 RSB tVal14, leftStep, leftStep, LSL #3 ;// 7*leftStep 410 LSL tVal2, tVal2, #4 ;// a = 16 * (pSrcAbove[15] + pSrcLeft[15*lS]) 415 ADD tVal9, tVal9, tVal9, LSL #1 ;// H1 = 3 * (pSrcAbove[6] - pSrcAbove[0]) 416 ADD tVal7, tVal9, tVal7, LSL #2 ;// H = H1 + H0 420 ADD tVal7, tVal7, tVal8, LSL #1 ;// H = H + H2 428 ADD tVal7, tVal7, tVal7, LSL #4 ;// 17 * H 432 ADD tVal8, tVal8, tVal8, LSL #1 ;// V1 = 3 * (pSrcLeft[6*leftStep] - pSrcLeft[0]) 433 ADD tVal6, tVal8, tVal6, LSL #2 ;// V = V0 +V1 436 ADD tVal7, b, b, LSL #1 ;// 3* [all...] |
armVCM4P10_TransformResidual4x4_s.s | 186 PKHBT trRow00,in00,in10,LSL #16 ;// [1 0] = [f4:f0] 196 PKHBT trRow20,in02,in12,LSL #16 ;// [9 8] = [6 2] 204 PKHBT trRow02,in20,in30,LSL #16 ;// [3 2] = [f12:f8] 217 PKHBT trRow22,in22,in32,LSL #16 ;// [11 10] = [14 10] 266 PKHBT trCol00,rowOp00,rowOp10,LSL #16 ;// [1 0] = [f4:f0] 276 PKHBT trCol20,rowOp02,rowOp12,LSL #16 ;// [9 8] = [6 2] 284 PKHBT trCol02,rowOp20,rowOp30,LSL #16 ;// [3 2] = [f12:f8] 297 PKHBT trCol22,rowOp22,rowOp32,LSL #16 ;// [11 10] = [14 10]
|
omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s | 178 SUB pQ0, pQ0, srcdstStep, LSL #2 245 ORR apqflg, apflg, t1, LSL #1 263 STR Q2b, [pQ0b, Stepb, LSL #1] 267 SUB pQ0, pQ0b, Stepb, LSL #2 279 SUB pQ0, pQ0, srcdstStep, LSL #3 311 M_STR P1a, [pQ0a, Stepa, LSL #1]! 320 SUB pQ0, pQ0a, Stepa, LSL #2 332 ADD pQ0, pQ0, srcdstStep, LSL #2
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
armVCM4P10_Average_4x_Align_unsafe_s.s | 143 ORR iPredA0, iPredA0, Temp1, LSL #16 145 ORR iPredA1, iPredA1, Temp2, LSL #16 165 ORR iPredA0, iPredA0, Temp1, LSL #16 167 ORR iPredA1, iPredA1, Temp2, LSL #16 199 ORR iPredA0, iPredA0, Temp1, LSL #8 201 ORR iPredA1, iPredA1, Temp2, LSL #8 220 ORR iPredA0, iPredA0, Temp1, LSL #8 222 ORR iPredA1, iPredA1, Temp2, LSL #8
|
armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.s | 105 ORR ValueA1, Temp3, Temp4, LSL #8 106 ORR ValueA0, Temp1, Temp2, LSL #8 145 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0] 146 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0] 148 PKHBT Temp1, ValueA0, ValueA1, LSL #16 ;// [d0 c0 b0 a0] 173 ORR ValueA1, Temp3, Temp4, LSL #8 ;// [d2 c2 d0 c0] 174 ORR ValueA0, Temp1, Temp2, LSL #8 ;// [b2 a2 b0 a0] 176 PKHBT Temp1, ValueA0, ValueA1, LSL #16 ;// [d0 c0 b0 a0]
|
armVCM4P10_UnpackBlock4x4_s.s | 89 AND strOffset, cstOffset, Flag, LSL #1 ;// strOffset = (Flag & 15) < 1; 91 ORRNE Value,Value,Value2, LSL #8 ;// Value = (OMX_U16) *pSrc++
|
omxVCM4P10_TransformDequantChromaDCFromPair_s.s | 104 AND strOffset, cstOffset, Flag, LSL #1 ;// strOffset = (Flag & 15) < 1; 106 ORRNE Value,Value,Value2, LSL #8 ;// Value = (OMX_U16) *pSrc++ 137 LSL Scale, Scale, Shift ;// Scale = Scale << Shift
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
armVCM4P10_Average_4x_Align_unsafe_s.S | 71 ORR r10,r10,r4,LSL #16 73 ORR r11,r11,r5,LSL #16 89 ORR r10,r10,r4,LSL #16 91 ORR r11,r11,r5,LSL #16 113 ORR r10,r10,r4,LSL #8 115 ORR r11,r11,r5,LSL #8 131 ORR r10,r10,r4,LSL #8 133 ORR r11,r11,r5,LSL #8
|
armVCM4P10_UnpackBlock4x4_s.S | 45 AND r6,r7,r3,LSL #1 47 ORRNE r4,r4,r5,LSL #8
|
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
sp-pc-validations-bad-t.s | 45 LOADw [r0, r1, LSL #2] 69 ldrb.w pc,[r0,r1,LSL #1] @ => PLD 71 ldrb.w r2,[r0,pc,LSL #2] @ BadReg 72 ldrb.w r2,[r0,sp,LSL #2] @ ditto 152 ldrh.w pc,[r0,r1,LSL #1] @ => Unallocated memory hints 153 ldrh.w sp,[r0,r1,LSL #1] @ Unpredictable 154 ldrh.w r2,[r0,pc,LSL #1] @ ditto 155 ldrh.w r2,[r0,sp,LSL #1] @ ditto 182 ldrsb.w pc, [r0, r1, LSL #2] @ => PLI 183 @ldrsb.w r0, [pc, r0, LSL #2] => LDRSB (literal [all...] |
/system/core/libpixelflinger/codeflinger/ |
load_store.cpp | 80 ORR(AL, 0, s.reg, s.reg, reg_imm(s0, LSL, 8)); 82 ORR(AL, 0, s.reg, s.reg, reg_imm(s0, LSL, 16)); 87 ORR(AL, 0, s1, s1, reg_imm(s0, LSL, 8)); 89 ORR(AL, 0, s.reg, s1, reg_imm(s0, LSL, 16)); 123 MOV(AL, 0, d.reg, reg_imm(s, LSL, 32-h)); 198 RSB(AL, 0, d, s, reg_imm(s, LSL, dbits)); 204 MOV(AL, 0, d, reg_imm(s, LSL, dbits-sbits)); 218 ORR(AL, 0, d, s, reg_imm(s, LSL, sbits)); 296 MOV(AL, 0, ireg, reg_imm(s.reg, LSL, 32-sh)); 334 else if (shift<0) ADD(AL, 0, ireg, ireg, reg_imm(dither.reg, LSL,-shift)) [all...] |
/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_neon_Resize.S | 113 lsl r2, r0, #VECSHIFT 126 lsl r2, r2, r3 127 lsl r3, r1, r3 210 mov r9, r3, LSL #VECSHIFT 238 sub r8, r12, r10, LSL #COMPONENT_SHIFT + 1 274 sub r4, r4, r10, LSL #COMPONENT_SHIFT 275 sub r5, r5, r10, LSL #COMPONENT_SHIFT 276 sub r6, r6, r10, LSL #COMPONENT_SHIFT 277 sub r7, r7, r10, LSL #COMPONENT_SHIFT 287 mov r2, r2, LSL #(15 - CHUNKSHIFT [all...] |
/frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
h264bsd_interpolate_hor_half.s | 147 ADD tmp2, partH, partW, LSL #4 148 ADD count, count, tmp2, LSL #16 156 ADD count, count, tmp1, LSL #8 159 ADD count, count, tmp3, LSL #8 192 PKHBT tmp2, tmp2, tmp4, LSL #(16-5) 193 PKHBT tmp1, tmp1, tmp3, LSL #(16-5) 198 ORR tmp1, tmp1, tmp2, LSL #8 228 PKHBT tmp2, tmp2, tmp4, LSL #(16-5) 229 PKHBT tmp1, tmp1, tmp3, LSL #(16-5) 234 ORR tmp1, tmp1, tmp2, LSL # [all...] |
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
omxVCM4P2_DecodeVLCZigzag_IntraDCVLC_s.s | 158 ADD pDCLumaChromaIndex,pDCLumaChromaIndex,videoComp, LSL #6 180 LSL powOfSize,DCValueSize ;// powOfSize=pow(2,DCValueSize) 206 ADD pZigzagTable, pZigzagTable, PredDir, LSL #6 ;// Modify the Zigzag table adress based on PredDir
|
omxVCM4P2_MCReconBlock_s.s | 115 ORR $out0, $out0, $out1, LSL #(32 - 8 * ($offset)) 117 ORR $out1, $out1, $scratch, LSL #(32 - 8 * ($offset)) 222 ORR $word3, $word3, $word2, LSL #24 224 ORR $word2, $word2, $word1, LSL #24 229 ORR $word0, $word0, $word2, LSL #8 231 ORR $word1, $word1, $word3, LSL #8 234 ORR $word0, $word0, $word1, LSL #(32 - 8 * ($offset)) 236 ORR $word1, $word1, $word2, LSL #(32 - 8 * ($offset)) 239 ORR $word3, $word3, $word2, LSL #(32 - 8 * (($offset)+1)) 241 ORR $word2, $word2, $word1, LSL #2 [all...] |
omxVCM4P2_QuantInvInter_I_s.s | 122 PKHBT Result1,X2,X3,LSL #16 ;// Result1[0-15]=X2[0-15],Result1[16-31]=X3[16-31] 140 PKHBT Result2,X2,X3,LSL #16 ;// Result2[0-15]=X2[0-15],Result2[16-31]=X3[0-15]
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
omxVCM4P2_DecodeVLCZigzag_IntraDCVLC_s.s | 158 ADD pDCLumaChromaIndex,pDCLumaChromaIndex,videoComp, LSL #6 180 LSL powOfSize,DCValueSize ;// powOfSize=pow(2,DCValueSize) 206 ADD pZigzagTable, pZigzagTable, PredDir, LSL #6 ;// Modify the Zigzag table adress based on PredDir
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/comm/src/ |
omxVCCOMM_ExpandFrame_I_s.s | 157 ADD y,iFrameHeight,iExpandPels,LSL #1 160 RSB RowStep,iExpandPels,iPlaneStep,LSL #1 166 M_LDRB tempLeft1,[pSrcDstPlane],iPlaneStep,LSL #1 ;// PreLoad the values 167 M_LDRB tempRight1,[pRightIndex],iPlaneStep,LSL #1
|
/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
Norm_Corr_opt.s | 59 ADD r5, r0, r11, LSL #1 @get the &exc[k] 92 ADD r9, r7, r6, LSL #1 @L_tmp = (L_tmp << 1) + 1 129 ADD r5, r10, r5, LSL #1 @L_tmp = (L_tmp << 1) + 1 130 ADD r6, r10, r6, LSL #1 @L_tmp1 = (L_tmp1 << 1) + 1 138 MOV r5, r5, LSL r10 @L_tmp = (L_tmp << exp) 144 MOV r6, r6, LSL r5 @L_tmp = (L_tmp1 << exp) 178 MOVGT r12, r12, LSL r6 @L_tmp = L_shl(L_tmp, exp_corr + exp_norm + scale) 185 ADD r10, r5, r4, LSL #1 @ get corr_norm[t] address 200 ADD r8, r8, r5, LSL #1 @ exc[k] address 201 ADD r9, r9, r6, LSL #1 @ h[i] addres [all...] |
Syn_filt_32_opt.s | 56 ORR r10, r6, r7, LSL #16 @ Aq[2] -- Aq[1] 57 ORR r11, r8, r9, LSL #16 @ Aq[4] -- Aq[3] 67 ORR r10, r6, r7, LSL #16 @ Aq[6] -- Aq[5] 68 ORR r11, r8, r9, LSL #16 @ Aq[8] -- Aq[7] 78 ORR r10, r6, r7, LSL #16 @ Aq[10] -- Aq[9] 79 ORR r11, r8, r9, LSL #16 @ Aq[12] -- Aq[11] 89 ORR r10, r6, r7, LSL #16 @ Aq[14] -- Aq[13] 90 ORR r11, r8, r9, LSL #16 @ Aq[16] -- Aq[15] 146 ADD r14, r14, r7, LSL #1 @ L_tmp += (exc[i] * a0) << 1 207 MOV r14, r14, LSL #3 @ L_tmp <<= [all...] |
Dot_p_opt.s | 62 MOV r12, r4, LSL #1 70 MOV r0, r12, LSL r10 @ L_sum = L_sum << sft
|
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
armCOMM_IDCT_s.h | 251 PKHBT xi4, xi3, xi4, LSL #(16-SHIFT) 256 PKHBT xi5, xi0, xi5, LSL #(16-SHIFT) 260 PKHBT xi6, xi1, xi6, LSL #(16-SHIFT) 262 PKHBT xi7, xi2, xi7, LSL #(16-SHIFT) 276 PKHBT xi4, xi0, xi1, LSL #(16-SHIFT) 278 PKHBT xi5, xi2, xi3, LSL #(16-SHIFT) 288 PKHBT xi6, xi0, xi1, LSL #(16-SHIFT) 290 PKHBT xi7, xi2, xi3, LSL #(16-SHIFT) 322 PKHBT xi0, xi7, xi0, LSL #(16-SHIFT) 327 PKHBT xi1, xi4, xi1, LSL #(16-SHIFT [all...] |