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  /external/llvm/test/MC/AArch64/
basic-a64-instructions.s     [all...]
  /external/libavc/common/arm/
ih264_iquant_itrans_recon_a9.s 184 vld1.32 d31[0], [r1], r3 @III row Load pu1_pred buf
203 vld1.32 d31[1], [r1], r3 @IV row Load pu1_pred buffer
215 vaddw.u8 q11, q11, d31
378 vld2.8 {d30, d31}, [r1], r3 @IV row Load pu1_pred buffer
747 vld1.32 d31, [r1], r3 @ Q12 = 0x070605....0x070605....
840 vaddw.u8 q3, q3, d31
    [all...]
ih264_deblk_luma_a9.s 166 vqshrn.s16 d31, q15, #1 @
304 vld1.8 {d30, d31}, [r3] @load p2 to Q15
318 vaddw.u8 q2, q2, d31 @2*(p0+q0+p1)+p2 H
331 vaddw.u8 q2, q13, d31 @(p0+q0+p1) +p2 H
337 vaddl.u8 q8, d31, d25 @p2+p3 H
350 vst1.8 {d30, d31}, [r3] @store p2
    [all...]
  /external/libhevc/common/arm/
ihevc_inter_pred_chroma_horz.s 219 vqrshrun.s16 d31,q14,#6
287 vqrshrun.s16 d31,q14,#6
341 vqrshrun.s16 d31,q14,#6
ihevc_intra_pred_chroma_horz.s 221 @vsubl.u8 q12,d31,d28
ihevc_intra_pred_luma_horz.s 216 vsubl.u8 q12,d31,d28
  /external/libvpx/libvpx/vpx_dsp/arm/
loopfilter_8_neon.asm 346 vqrshrn.u16 d31, q14, #3 ; r_op1
361 vbit d1, d31, d20 ; op1 |= r_op1 & (flat & mask)
idct32x32_add_neon.asm 254 vdup.16 d31, r12
258 vmull.s16 q10, $regA, d31
260 vmull.s16 q11, $regB, d31
261 vmull.s16 q12, $regC, d31
267 vmull.s16 q10, $regD, d31
    [all...]
  /external/v8/src/arm/
deoptimizer-arm.cc 156 // Push registers d0-d15, and possibly d16-d31, on the stack.
157 // If d16-d31 are not pushed, decrease the stack pointer instead.
158 __ vstm(db_w, sp, d16, d31, ne);
simulator-arm.h 126 d24, d25, d26, d27, d28, d29, d30, d31, enumerator in enum:v8::internal::Simulator::Register
assembler-arm.h 64 V(d24) V(d25) V(d26) V(d27) V(d28) V(d29) V(d30) V(d31)
70 V(d24) V(d25) V(d26) V(d27) V(d28) V(d29) V(d30) V(d31)
356 const DwVfpRegister d31 = { 31 };
    [all...]
  /external/v8/src/ppc/
simulator-ppc.h 171 d31, enumerator in enum:v8::internal::Simulator::Register
assembler-ppc.h 101 V(d24) V(d25) V(d26) V(d27) V(d28) V(d29) V(d30) V(d31)
107 V(d24) V(d25) V(d26) V(d27) V(d28) V(d29) V(d30) V(d31)
242 #define kLastCalleeSavedDoubleReg d31
    [all...]
  /external/llvm/test/MC/ARM/
neon-vld-encoding.s 161 vld3.u16 {d27, d29, d31}, [r4]
183 @ CHECK: vld3.16 {d27, d29, d31}, [r4] @ encoding: [0x4f,0xb5,0x64,0xf4]
307 vld3.u16 {d27[2], d29[2], d31[2]}, [r4]
325 @ CHECK: vld3.16 {d27[2], d29[2], d31[2]}, [r4] @ encoding: [0xaf,0xb6,0xe4,0xf4]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
illegal.s 52 sha1h s7, d31
53 sha1h q7, d31
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
neon-omit.d 73 0[0-9a-f]+ <[^>]+> f227503f vqadd\.s32 d5, d7, d31
  /external/libavc/encoder/arm/
ime_distortion_metrics_a9q.s 996 vld1.u8 d31, [r1], r3 @I load 8 pix pred row 1
1003 vabdl.u8 q0, d30, d31 @I Abs diff r1 blk 12
1059 vld1.u8 d31, [r1], r3 @II load first 8 pix pred row 1
    [all...]
  /external/v8/test/cctest/
test-assembler-arm64.cc     [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/
vp9_idct32x32_add_neon.asm 254 vdup.16 d31, r12
258 vmull.s16 q10, $regA, d31
260 vmull.s16 q11, $regB, d31
261 vmull.s16 q12, $regC, d31
267 vmull.s16 q10, $regD, d31
    [all...]
  /external/v8/test/mjsunit/asm/embenchen/
box2d.js     [all...]
lua_binarytrees.js     [all...]
  /art/compiler/optimizing/
code_generator_arm64.h 53 const vixl::CPURegList vixl_reserved_fp_registers(vixl::d31);
  /external/libunwind_llvm/src/
UnwindRegistersRestore.S 306 ldr d31, [x0, #0x208]
383 vldmia r0, {d16-d31}
UnwindRegistersSave.S 279 str d31, [x0, #0x208]
369 vstmia r0, {d16-d31}
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/
omxVCM4P10_InterpolateLuma_s.S 39 VMOV.I16 d31,#0x14

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