| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumb2_it_bad.l | 2 [^:]*:8: Error: branch must be last instruction in IT block -- `beq foo'
3 [^:]*:9: Error: branch must be last instruction in IT block -- `bleq foo'
4 [^:]*:10: Error: branch must be last instruction in IT block -- `blxeq r0'
5 [^:]*:11: Error: instruction not allowed in IT block -- `cbzeq r0,foo'
6 [^:]*:13: Error: branch must be last instruction in IT block -- `bxeq r0'
7 [^:]*:14: Error: branch must be last instruction in IT block -- `tbbeq \[r0,r1\]'
8 [^:]*:15: Error: instruction not allowed in IT block -- `cpsieeq f'
9 [^:]*:17: Error: instruction not allowed in IT block -- `cpseq #0x10'
10 [^:]*:19: Error: instruction is always unconditional -- `bkpteq 0'
11 [^:]*:20: Error: instruction not allowed in IT block -- `setendeq le
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| sse-check-error.l | 17 [ ]*6[ ]+\# SSE instruction
19 .* Error: SSE instruction `addps' is used
21 [ ]*9[ ]+\# SSE2 instruction
23 .* Error: SSE instruction `addpd' is used
25 [ ]*12[ ]+\# SSE3 instruction
27 .* Error: SSE instruction `addsubpd' is used
29 [ ]*15[ ]+\# SSSE3 instruction
31 .* Error: SSE instruction `phaddw' is used
36 .* Error: SSE instruction `blendvpd' is used
39 .* Error: SSE instruction `pcmpgtq' is use
[all...] |
| x86-64-sse-check-error.l | 17 [ ]*6[ ]+\# SSE instruction
19 .* Error: SSE instruction `addps' is used
21 [ ]*9[ ]+\# SSE2 instruction
23 .* Error: SSE instruction `addpd' is used
25 [ ]*12[ ]+\# SSE3 instruction
27 .* Error: SSE instruction `addsubpd' is used
29 [ ]*15[ ]+\# SSSE3 instruction
31 .* Error: SSE instruction `phaddw' is used
36 .* Error: SSE instruction `blendvpd' is used
39 .* Error: SSE instruction `pcmpgtq' is use
[all...] |
| invpcid.s | 1 # Check INVPCID instruction
|
| x86-64-invpcid.s | 1 # Check 64bit INVPCID instruction
|
| x86-64-mpx-inval-1.l | 2 .*:4: Error: expecting valid branch instruction after `bnd'
3 .*:5: Error: expecting valid branch instruction after `bnd'
4 .*:6: Error: expecting valid branch instruction after `bnd'
5 .*:7: Error: expecting valid branch instruction after `bnd'
6 .*:10: Error: expecting valid branch instruction after `bnd'
7 .*:11: Error: expecting valid branch instruction after `bnd'
8 .*:12: Error: expecting valid branch instruction after `bnd'
9 .*:13: Error: expecting valid branch instruction after `bnd'
17 .* Error: expecting valid branch instruction after `bnd'
19 .* Error: expecting valid branch instruction after `bnd
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/immutable/instruction/ |
| ImmutableInstruction35c.java | 32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction35c;
73 public static ImmutableInstruction35c of(Instruction35c instruction) {
74 if (instruction instanceof ImmutableInstruction35c) {
75 return (ImmutableInstruction35c)instruction;
78 instruction.getOpcode(),
79 instruction.getRegisterCount(),
80 instruction.getRegisterC(),
81 instruction.getRegisterD(),
82 instruction.getRegisterE()
[all...] |
| ImmutableInstruction35mi.java | 32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction35mi;
70 public static ImmutableInstruction35mi of(Instruction35mi instruction) {
71 if (instruction instanceof ImmutableInstruction35mi) {
72 return (ImmutableInstruction35mi)instruction;
75 instruction.getOpcode(),
76 instruction.getRegisterCount(),
77 instruction.getRegisterC(),
78 instruction.getRegisterD(),
79 instruction.getRegisterE()
[all...] |
| ImmutableInstruction35ms.java | 32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction35ms;
70 public static ImmutableInstruction35ms of(Instruction35ms instruction) {
71 if (instruction instanceof ImmutableInstruction35ms) {
72 return (ImmutableInstruction35ms)instruction;
75 instruction.getOpcode(),
76 instruction.getRegisterCount(),
77 instruction.getRegisterC(),
78 instruction.getRegisterD(),
79 instruction.getRegisterE()
[all...] |
| /external/jacoco/org.jacoco.core/src/org/jacoco/core/internal/instr/ |
| DuplicateFrameEliminator.java | 27 private boolean instruction; field in class:DuplicateFrameEliminator
31 instruction = true;
37 if (instruction) {
38 instruction = false;
45 instruction = true;
51 instruction = true;
57 instruction = true;
63 instruction = true;
70 instruction = true;
77 instruction = true
[all...] |
| /external/llvm/test/MC/ARM/ |
| directive-arch_extension-simd.s | 20 @ CHECK-V7: error: instruction requires: FPARMv8
22 @ CHECK-V7: error: instruction requires: FPARMv8
25 @ CHECK-V7: error: instruction requires: FPARMv8
27 @ CHECK-V7: error: instruction requires: FPARMv8
30 @ CHECK-V7: error: instruction requires: FPARMv8
32 @ CHECK-V7: error: instruction requires: FPARMv8
34 @ CHECK-V7: error: instruction requires: FPARMv8
36 @ CHECK-V7: error: instruction requires: FPARMv8
38 @ CHECK-V7: error: instruction requires: FPARMv8
40 @ CHECK-V7: error: instruction requires: FPARMv
[all...] |
| thumb2-strd.s | 5 @ CHECK: error: invalid operand for instruction
6 @ CHECK: error: invalid operand for instruction
7 @ CHECK: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/eva/ |
| invalid-noeva-wrong-error.s | 22 cachee 31, 255($7) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
23 cachee 0, -256($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
24 cachee 5, -140($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
25 lbe $10,-256($25) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
26 lbe $13,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
27 lbe $11,146($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
28 lbue $13,-256($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
29 lbue $13,255($v0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
30 lbue $13,-190($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
31 lhe $13,-256($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all...] |
| invalid_R6.s | 9 lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11 lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
12 lwre $zero,255($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 lwre $zero,-256($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 lwre $zero,-176($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15 swle $9,255($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 swle $10,-256($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
17 swle $8,131($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
18 swre $s4,255($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips-gp64-fp64.l | 2 .*:92: Warning: macro instruction expanded into multiple instructions in a branch delay slot
3 .*:96: Warning: macro instruction expanded into multiple instructions in a branch delay slot
4 .*:100: Warning: macro instruction expanded into multiple instructions in a branch delay slot
|
| /external/proguard/src/proguard/classfile/instruction/visitor/ |
| InstructionCounter.java | 21 package proguard.classfile.instruction.visitor;
25 import proguard.classfile.instruction.Instruction;
55 Instruction instruction)
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips2-wrong-error.s | 9 ldc1 $f11,16391($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11 ldc3 $29,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
12 ll $v0,-7321($s2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 sc $t7,18904($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 sdc1 $f31,30574($t5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15 sdc2 $20,23157($s2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 sdc3 $12,5835($t2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips4-wrong-error.s | 9 bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11 ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
12 lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 scd $15,-8243($sp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 sd $12,5835($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15 sdl $a3,-20961($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 sdr $11,-20423($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32-wrong-error.s | 9 bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
10 bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
11 bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
12 bc2t $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
13 bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
14 bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
15 bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
16 bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64r2.s | 8 clo $11,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 clz $sp,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 dclo $s2,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 dclz $s0,$25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 deret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 drotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips2.s | 8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 bc1fl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 bc1fl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 bc1tl $fcc0,-8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 bc1tl -8239 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| invalid-mips32-wrong-error.s | 9 bc2f $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
10 bc2f 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
11 bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
12 bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
13 bc2t $fcc0,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
14 bc2t 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
15 bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
16 bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/iface/instruction/ |
| FiveRegisterInstruction.java | 32 package org.jf.dexlib2.iface.instruction;
|
| Instruction.java | 32 package org.jf.dexlib2.iface.instruction;
37 * This class represents a generic instruction.
39 * There are two categories of sub-interfaces of this interface. The dexlib2.iface.instruction.* interfaces are set of
40 * generic categories of instructions, while the dexlib2.iface.instruction.formats.* interfaces each represent a
41 * specific instruction format, and are typically built up as a composite of generic instruction interfaces.
43 public interface Instruction {
45 * Gets the opcode of this instruction.
47 * @return The Opcode of this instruction.
52 * Gets the size of this instruction
[all...] |
| /external/smali/smalidea/src/main/java/org/jf/smalidea/dexlib/instruction/ |
| SmalideaInstruction35c.java | 32 package org.jf.smalidea.dexlib.instruction;
34 import org.jf.dexlib2.iface.instruction.formats.Instruction35c;
40 public SmalideaInstruction35c(@Nonnull SmaliInstruction instruction) {
41 super(instruction);
|
