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    Searched refs:isReg (Results 101 - 125 of 212) sorted by null

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  /external/llvm/lib/Target/ARM/InstPrinter/
ARMInstPrinter.cpp 322 if (Op.isReg()) {
484 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
557 if (!MO1.isReg()) { // For label symbolic references.
630 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonStoreWidening.cpp 109 assert(MO.isReg() && "Expecting register operand");
159 return MI->getOperand(0).isReg();
HexagonBitSimplify.cpp 249 if (!Op.isReg() || !Op.isDef())
261 if (!Op.isReg() || !Op.isUse())
    [all...]
HexagonGenPredicate.cpp 336 if (Mo->isReg() && Mo->isUse())
358 if (!MO.isReg() || !MO.isUse())
  /external/llvm/lib/Target/X86/
X86FloatingPoint.cpp 287 assert(MO.isReg() && "Expected an FP register!");
402 if (MO.isReg() && MO.isDead())
    [all...]
X86ExpandPseudo.cpp 135 assert(DestAddr.isReg() && "Offset should be in register!");
X86OptimizeLEAs.cpp 182 (!MO1.isReg() ||
X86VZeroUpper.cpp 130 if (!MO.isReg())
  /external/llvm/utils/TableGen/
FixedLenDecoderEmitter.cpp     [all...]
  /external/llvm/lib/CodeGen/
LiveVariables.cpp 216 if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0)
521 if (!MO.isReg() || MO.getReg() == 0)
693 if (MO.isReg() && MO.isKill()) {
786 if (I->isReg() && TargetRegisterInfo::isVirtualRegister(I->getReg())) {
BranchFolding.cpp 174 if (!MO.isReg() || !MO.isUse())
    [all...]
ScheduleDAGInstrs.cpp 223 if (!MO.isReg() || MO.isDef()) continue;
800 if (!MO.isReg())
    [all...]
LiveIntervalAnalysis.cpp 765 if (!MO.isReg() || MO.getReg() != Reg)
    [all...]
EarlyIfConversion.cpp 234 if (!MO.isReg())
289 if (!MO.isReg())
  /external/llvm/lib/Target/AMDGPU/MCTargetDesc/
SIMCCodeEmitter.cpp 247 if (MO.isReg())
  /external/llvm/lib/Target/AMDGPU/
SIFixSGPRCopies.cpp 118 if (!MI.getOperand(i).isReg() ||
AMDGPUAsmPrinter.cpp 273 if (!MO.isReg())
347 if (!MO.isReg())
  /external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonInstPrinter.cpp 95 if (MO.isReg()) {
  /external/llvm/lib/Target/Mips/
MipsInstrInfo.cpp 105 if (Cond[i].isReg())
  /external/llvm/lib/Target/NVPTX/InstPrinter/
NVPTXInstPrinter.cpp 81 if (Op.isReg()) {
  /external/llvm/lib/Target/SystemZ/InstPrinter/
SystemZInstPrinter.cpp 42 if (MO.isReg())
  /external/llvm/lib/Target/X86/InstPrinter/
X86ATTInstPrinter.cpp 165 if (Op.isReg()) {
X86IntelInstPrinter.cpp 147 if (Op.isReg()) {
  /external/llvm/lib/Target/PowerPC/
PPCAsmPrinter.cpp 254 if (!MI->getOperand(OpNo).isReg() ||
256 !MI->getOperand(OpNo+1).isReg())
304 assert(MI->getOperand(OpNo).isReg());
310 assert(MI->getOperand(OpNo).isReg());
463 assert(MI->getOperand(0).isReg() &&
467 assert(MI->getOperand(1).isReg() &&
    [all...]
  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp     [all...]

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