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    Searched refs:isReg (Results 51 - 75 of 212) sorted by null

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  /external/llvm/lib/Target/ARM/
A15SDOptimizer.cpp 140 if (!MO.isReg())
167 assert(MO->isReg() && "Non-register operand found!");
199 if ((!MO.isReg()) || (!MO.isUse()))
222 if ((!MODef.isReg()) || (!MODef.isDef()))
306 if (!MI->getOperand(I).isReg())
416 if (!MO.isReg() || !MO.isUse())
Thumb2ITBlockPass.cpp 65 if (!MO.isReg())
98 if (!MO.isReg() || MO.isDef() || !MO.isKill())
  /external/llvm/lib/CodeGen/
RegisterScavenging.cpp 127 if (!MO.isReg())
199 if (!MO.isReg())
316 if (!MO.isReg() || MO.isUndef() || !MO.getReg())
376 if (MO.isReg() && MO.getReg() != 0 && !(MO.isUse() && MO.isUndef()) &&
LiveDebugVariables.cpp 185 if (LocMO.isReg()) {
190 if (locations[i].isReg() &&
202 if (locations.back().isReg())
452 if (locations[i].isReg() &&
491 !(MI->getOperand(1).isReg() || MI->getOperand(1).isImm()) ||
672 if (!Loc.isReg()) {
879 if (!Loc->isReg() || Loc->getReg() != OldReg)
913 if (!Loc.isReg() || !Loc.getReg() ||
    [all...]
TargetSchedule.cpp 131 if (MO.isReg() && MO.isDef())
147 if (MO.isReg() && MO.readsReg())
CriticalAntiDepBreaker.cpp 174 if (!MO.isReg()) continue;
260 if (!MO.isReg()) continue;
288 if (!MO.isReg()) continue;
351 if (!CheckOper.isReg() || !CheckOper.isDef() ||
599 if (!MO.isReg()) continue;
ExecutionDepsFix.cpp 516 if (!MO.isReg())
586 if (!mo.isReg()) continue;
595 if (!mo.isReg()) continue;
615 if (!mo.isReg()) continue;
711 if (!mo.isReg()) continue;
TargetInstrInfo.cpp 127 if (HasDef && !MI->getOperand(0).isReg())
136 assert(MI->getOperand(Idx1).isReg() && MI->getOperand(Idx2).isReg() &&
253 if (!MI->getOperand(SrcOpIdx1).isReg() ||
254 !MI->getOperand(SrcOpIdx2).isReg())
286 if (MO.isReg()) {
573 if (Op1.isReg() && TargetRegisterInfo::isVirtualRegister(Op1.getReg()))
575 if (Op2.isReg() && TargetRegisterInfo::isVirtualRegister(Op2.getReg()))
830 if (!MI->getNumOperands() || !MI->getOperand(0).isReg())
868 if (!MO.isReg()) continue
    [all...]
TwoAddressInstructionPass.cpp 202 if (!MO.isReg())
272 if (!MO.isReg())
478 if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg)
873 if (!MO.isReg())
    [all...]
AggressiveAntiDepBreaker.cpp 220 if (!MO.isReg() || !MO.isImplicit())
240 if (!MO.isReg()) continue;
349 if (!MO.isReg() || !MO.isDef()) continue;
359 if (!MO.isReg() || !MO.isDef()) continue;
401 if (!MO.isReg() || !MO.isDef()) continue;
455 if (!MO.isReg() || !MO.isUse()) continue;
490 if (!MO.isReg()) continue;
    [all...]
  /external/llvm/lib/Target/Mips/
Mips16RegisterInfo.cpp 113 if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg())
MipsOptimizePICCall.cpp 110 if (!MO.isReg() || !MO.isUse() ||
152 if (MO.isReg() && MO.getReg() == Reg) {
  /external/llvm/lib/Target/Sparc/
DelaySlotFiller.cpp 255 if (!MO.isReg())
289 assert(Reg.isReg() && "CALL first operand is not a register.");
296 assert(RegOrImm.isReg() && "CALLrr second operand is not a register.");
310 if (!MO.isReg())
  /external/llvm/lib/Target/SystemZ/
SystemZMCInstLower.cpp 100 if (!MO.isReg() || !MO.isImplicit())
  /external/llvm/lib/Target/WebAssembly/InstPrinter/
WebAssemblyInstPrinter.cpp 84 if (Op.isReg()) {
  /external/llvm/lib/Target/X86/
X86CallFrameOptimization.cpp 295 if (!MO.isReg())
347 if (!I->isCopy() || !I->getOperand(0).isReg())
379 if (!I->getOperand(X86::AddrBaseReg).isReg() ||
406 if (!MO.isReg())
  /external/mesa3d/src/gallium/drivers/radeon/
AMDGPUAsmPrinter.cpp 76 if (!MO.isReg()) {
  /external/llvm/lib/Target/Hexagon/
HexagonCopyToCombine.cpp 122 assert(Op0.isReg() && Op1.isReg());
135 assert(Op0.isReg());
197 if (!Op.isReg() || Op.getReg() != RegNotKilled || !Op.isKill())
216 return MO.isReg() ? MO.getReg() : 0;
355 if (!Op.isReg() || !Op.isUse() || !Op.getReg())
385 if (!Op.isReg() || !Op.isDef() || !Op.getReg())
524 bool IsHiReg = HiOperand.isReg();
525 bool IsLoReg = LoOperand.isReg();
HexagonPeephole.cpp 309 if (Src.isReg()) {
321 } else if (Src.isReg()) {
  /external/llvm/lib/CodeGen/AsmPrinter/
DbgValueHistoryCalculator.cpp 33 return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
138 if (!MO.isReg() || !MO.isDef() || !MO.getReg())
  /external/llvm/lib/Target/AMDGPU/
R600EmitClauseMarkers.cpp 68 if (MO.isReg() && MO.getReg() == AMDGPU::ALU_LITERAL_X)
189 if (!MOI->isReg() || !MOI->isDef() ||
  /external/llvm/lib/Target/NVPTX/
NVPTXInstrInfo.cpp 79 assert(dest.isReg() && "dest of a movrr is not a reg");
80 assert(src.isReg() && "src of a movrr is not a reg");
  /external/llvm/utils/TableGen/
CodeGenInstruction.h 325 bool isReg() const { return Kind == K_Reg; }
330 Record *getRegister() const { assert(isReg()); return R; }
  /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
SIMCCodeEmitter.cpp 143 if (MO.isReg()) {
235 if (MO.isReg()) {
R600MCCodeEmitter.cpp 245 if (MO.isReg()) {
264 if (MO.isReg()) {
273 (MO.isReg() &&
301 if (MO.isReg() && MO.getReg() != AMDGPU::PREDICATE_BIT) {
623 if (MO.isReg()) {

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