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  /external/llvm/test/MC/Mips/mips32/
valid.s 88 madd $s6,$13
89 madd $zero,$9
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
alias.d 14 18: 1b020c20 madd w0, w1, w2, w3
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mep/
dj1.s 906 madd $0,$0
914 madd $15,$0
922 madd $0,$15
930 madd $15,$15
allinsn.be.d 738 0000058c <madd>:
739 58c: f4 b1 30 04 madd \$4,\$11
740 590: ff e1 30 04 madd \$sp,\$gp
741 594: fe f1 30 04 madd \$gp,\$sp
742 598: f4 d1 30 04 madd \$4,\$tp
743 59c: f1 e1 30 04 madd \$1,\$gp
    [all...]
allinsn.le.d 738 0000058c <madd>:
739 58c: b1 f4 04 30 madd \$4,\$11
740 590: e1 ff 04 30 madd \$sp,\$gp
741 594: f1 fe 04 30 madd \$gp,\$sp
742 598: d1 f4 04 30 madd \$4,\$tp
743 59c: e1 f1 04 30 madd \$1,\$gp
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
micromips@mips32-dspr2.d 27 0+003e <[^>]*> 018b 8abc madd \$ac2,t3,t4
micromips@mips5-fp.d 50 [0-9a-f]+ <[^>]*> 5758 a591 madd\.ps \$f20,\$f22,\$f24,\$f26
micromips@mips32-dsp.d 141 0+0202 <[^>]*> 018b 8abc madd \$ac2,t3,t4
mips32-dsp.d 139 0+0204 <[^>]*> 716c1000 madd \$ac2,t3,t4
mipsr6@mips32-dsp.d 141 0+0204 <[^>]*> 716c1000 madd \$ac2,t3,t4
r6-removed.l 137 .*:138: Error: opcode not supported on this processor: .* \(.*\) `madd \$2,\$3'
139 .*:140: Error: opcode not supported on this processor: .* \(.*\) `madd.s \$f5,\$f6,\$f7,\$f8'
140 .*:141: Error: opcode not supported on this processor: .* \(.*\) `madd.d \$f6,\$f8,\$f10,\$f12'
141 .*:142: Error: opcode not supported on this processor: .* \(.*\) `madd.ps \$f6,\$f8,\$f10,\$f12'
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/sh64/
basic-1.s 125 madd.l r34,r32,r7
126 madd.w r23,r53,r17
basic-1.d 127 [ ]+1d8:[ ]+0a228070[ ]+madd\.l r34,r32,r7
128 [ ]+1dc:[ ]+0971d510[ ]+madd\.w r23,r53,r17
  /external/llvm/test/MC/Mips/micromips-dsp/
valid.s 30 madd $ac1, $6, $7 # CHECK: madd $ac1, $6, $7 # encoding: [0x00,0xe6,0x4a,0xbc]
  /external/llvm/test/MC/Mips/mips64r2/
valid.s 169 madd $s6,$13
170 madd $zero,$9
171 madd.s $f1,$f31,$f19,$f25
  /external/llvm/test/MC/Mips/mips64r3/
valid.s 169 madd $s6,$13
170 madd $zero,$9
171 madd.s $f1,$f31,$f19,$f25
  /external/llvm/test/MC/Mips/mips64r5/
valid.s 170 madd $s6,$13
171 madd $zero,$9
172 madd.s $f1,$f31,$f19,$f25
  /external/llvm/test/MC/AArch64/
basic-a64-instructions.s     [all...]
arm64-arithmetic-encoding.s 460 madd w1, w2, w3, w4
461 madd x1, x2, x3, x4
469 ; CHECK: madd w1, w2, w3, w4 ; encoding: [0x41,0x10,0x03,0x1b]
470 ; CHECK: madd x1, x2, x3, x4 ; encoding: [0x41,0x10,0x03,0x9b]
  /external/libhevc/common/arm64/
ihevc_sao_edge_offset_class2.s 104 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
155 madd x12, x11, x1, x10 //wd - 1 + (ht - 1) * src_strd
    [all...]
ihevc_sao_edge_offset_class3.s 104 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
160 madd x12, x11, x1, x0 //pu1_src[(ht - 1) * src_strd]
    [all...]
ihevc_sao_edge_offset_class2_chroma.s 118 madd x11, x10, x1, x0 //pu1_src[(ht - 1) * src_strd + col]
213 madd x12, x11, x1, x10 //wd - 2 + (ht - 1) * src_strd
    [all...]
  /external/llvm/test/MC/Mips/micromips-dspr2/
valid.s 43 madd $ac1, $6, $7 # CHECK: madd $ac1, $6, $7 # encoding: [0x00,0xe6,0x4a,0xbc]
  /external/llvm/test/MC/Mips/mips4/
valid.s 145 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
146 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0]
  /external/llvm/test/MC/Mips/mips5/
valid.s 146 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
147 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0]

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