/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/ |
ldst01.d | 37 6c: 01 88 94 11 ld.l %r17\(%r12\),%r20
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ldst02.d | 37 6c: 00 88 94 11 ld.s %r17\(%r12\),%r20
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ldst03.d | 41 7c: 00 88 94 01 ld.b %r17\(%r12\),%r20
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
opc-a.pl | 72 padd2.uuu r17 = r30, r31 82 psub2.uuu r17 = r30, r31
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unwind-ok.s | 49 .spillreg ar.bspstore, r17 186 .save ar.bsp, r17
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
common.d | 14 c: (7e 30 90 79|79 90 30 7e) andc. r16,r17,r18 156 244: (7e 21 03 a6|a6 03 21 7e) mtxer r17 161 258: (7e 11 04 d0|d0 04 11 7e) nego r16,r17 169 278: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17 184 2b4: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\)
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e500.d | 15 14: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18
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/external/valgrind/none/tests/ppc64/ |
test_isa_2_07_part1.c | 195 register HWord_t r17 __asm__ ("r17"); 311 __asm__ __volatile__ ("lbarx %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); 314 __asm__ __volatile__ ("stbcx. %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); 322 __asm__ __volatile__ ("lharx %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); 325 __asm__ __volatile__ ("sthcx. %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); 334 __asm__ __volatile__ ("lqarx %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); 337 __asm__ __volatile__ ("stqcx. %0, %1, %2" : :"r" (r14), "r" (r16),"r" (r17)); 352 __asm__ __volatile__ ("lbarx %0, %1, %2, 0" : :"r" (r14), "r" (r16),"r" (r17)); 356 __asm__ __volatile__ ("lharx %0, %1, %2, 0" : :"r" (r14), "r" (r16),"r" (r17)); [all...] |
/external/llvm/test/MC/PowerPC/ |
ppc64-regs.s | 22 #CHECK: .cfi_offset r17, 136 139 .cfi_offset r17,136
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/prebuilts/go/darwin-x86/src/runtime/ |
signal_darwin_arm64.go | 32 func (c *sigctxt) r17() uint64 { return c.regs().x[17] } func
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signal_linux_arm64.go | 32 func (c *sigctxt) r17() uint64 { return c.regs().regs[17] } func
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signal_linux_ppc64x.go | 35 func (c *sigctxt) r17() uint64 { return c.regs().gpr[17] } func
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/prebuilts/go/linux-x86/src/runtime/ |
signal_darwin_arm64.go | 32 func (c *sigctxt) r17() uint64 { return c.regs().x[17] } func
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signal_linux_arm64.go | 32 func (c *sigctxt) r17() uint64 { return c.regs().regs[17] } func
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signal_linux_ppc64x.go | 35 func (c *sigctxt) r17() uint64 { return c.regs().gpr[17] } func
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/sh64/ |
err-1.s | 44 stx.l r17,-500,r48 ! { dg-error "invalid operand" }
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/external/valgrind/none/tests/ppc32/ |
jm-insns.c | 41 * I do preload test values in r14 thru r17 (or less, depending on the number 45 * I always get the result in r17 and also save XER and CCR for fixed-point 238 register HWord_t r17 __asm__ ("r17"); [all...] |
/external/valgrind/VEX/auxprogs/ |
genoffsets.c | 212 GENOFFSET(MIPS32,mips32,r17); 249 GENOFFSET(MIPS64,mips64,r17); 286 GENOFFSET(TILEGX,tilegx,r17);
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/external/compiler-rt/lib/tsan/rtl/ |
tsan_rtl_ppc64.S | 71 std r17,48(r3) 216 std r17,48(r3)
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arc/ |
add.d | 41 7c: 02 22 e8 41 41e82202 add.nz r15,r16,r17
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and.d | 41 7c: 02 22 e8 61 61e82202 and.nz r15,r16,r17
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bic.d | 41 7c: 02 22 e8 71 71e82202 bic.nz r15,r16,r17
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math.d | 43 000000b4 @IC+1@e82202 @OC@.ne r15,r16,r17
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sub.d | 41 7c: 02 22 e8 51 51e82202 sub.nz r15,r16,r17
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/cfi/ |
cfi-i386.d | 131 DW_CFA_undefined: r17 \(st\(?6\)?\)
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