| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tilegx/ |
| t_insns.d | 42 100: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; bnezt r15, 0 <target> }
43 108: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; bnez r15, 0 <target> }
44 110: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; bnez r15, 0 <target> }
45 118: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; bnez r15, 0 <target> }
46 120: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; bnez r15, 0 <target> }
47 128: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; blez r15, 0 <target> }
48 130: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; bgtzt r15, 0 <target> }
49 138: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; bgtzt r15, 0 <target> }
50 140: [0-9a-f]* { addli r5, r6, 4660 ; bgtzt r15, 0 <target> }
51 148: [0-9a-f]* { fsingle_pack1 r5, r6 ; beqzt r15, 0 <target>
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| opc-m.d | 10 0: 18 20 00 0a 00 10 \[MMB\] ld1 r4=\[r5\]
11 6: 40 30 14 00 24 00 ld1 r4=\[r5\],r6
13 10: 18 20 00 0a 00 16 \[MMB\] ld1 r4=\[r5\],-256
14 16: 40 00 14 04 20 00 ld1\.nt1 r4=\[r5\]
16 20: 18 20 18 0a 02 12 \[MMB\] ld1\.nt1 r4=\[r5\],r6
17 26: 40 68 14 04 2c 00 ld1\.nt1 r4=\[r5\],-243
19 30: 18 20 00 0a 06 10 \[MMB\] ld1\.nta r4=\[r5\]
20 36: 40 30 14 0c 24 00 ld1\.nta r4=\[r5\],r6
22 40: 18 20 68 0a 06 16 \[MMB\] ld1\.nta r4=\[r5\],-230
23 46: 40 00 14 40 20 00 ld1\.s r4=\[r5\]
[all...] |
| /external/llvm/test/MC/Hexagon/ |
| labels.s | 13 # CHECK: r5:4 = combine(r5, r4)
14 r5:4 = r5:4
23 # CHECK: r5 = memw(r1 + #0)
25 b: { r5 = memw(r1)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/ |
| instruction_packing.s | 19 add r4,r5 || ld r2,@r3
20 add r4,r5 || bra.s test_end
23 add r4,r5 || sra r0,r1
24 add r4,r5 || mulx a0, r6, r7
27 ld r2,@r3 || add r4,r5
28 bra.s test_end || add r4,r5
31 sra r0,r1 || add r4,r5
32 mulx a0, r6, r7 || add r4,r5
43 add r4,r5 -> ld r2,@r3
44 add r4,r5 -> bra.s test_en
[all...] |
| instruction_packing.d | 21 14: 30 23 02 8a ld r2, @r3 || add r4, r5
22 18: 24 0f 82 8a bra.s 94 <test_end> || add r4, r5
25 1c: 01 45 24 02 add r4, r5 || sra r0, r1
26 20: 01 45 2c ce add r4, r5 || mulx a0, r6, r7
29 24: 30 23 02 8a ld r2, @r3 || add r4, r5
30 28: 24 0d 82 8a bra.s 94 <test_end> || add r4, r5
33 2c: 01 45 24 02 add r4, r5 || sra r0, r1
34 30: 01 45 2c ce add r4, r5 || mulx a0, r6, r7
45 44: 41 45 60 46 add r4, r5 -> ld r2, @r3
46 48: 41 45 48 13 add r4, r5 -> bra.s 94 <test_end
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| copymem8x4_v6.asm | 21 ;push {r4-r5}
22 stmdb sp!, {r4-r5}
37 ldrb r5, [r0, #1]
43 strb r5, [r2, #1]
46 ldrb r5, [r0, #3]
51 strb r5, [r2, #3]
54 ldrb r5, [r0, #5]
57 strb r5, [r2, #5]
60 ldrb r5, [r0, #7]
65 strb r5, [r2, #7
[all...] |
| copymem8x8_v6.asm | 21 ;push {r4-r5}
22 stmdb sp!, {r4-r5}
37 ldrb r5, [r0, #1]
43 strb r5, [r2, #1]
46 ldrb r5, [r0, #3]
51 strb r5, [r2, #3]
54 ldrb r5, [r0, #5]
57 strb r5, [r2, #5]
60 ldrb r5, [r0, #7]
65 strb r5, [r2, #7
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| copymem8x4_v6.asm | 21 ;push {r4-r5}
22 stmdb sp!, {r4-r5}
37 ldrb r5, [r0, #1]
43 strb r5, [r2, #1]
46 ldrb r5, [r0, #3]
51 strb r5, [r2, #3]
54 ldrb r5, [r0, #5]
57 strb r5, [r2, #5]
60 ldrb r5, [r0, #7]
65 strb r5, [r2, #7
[all...] |
| copymem8x8_v6.asm | 21 ;push {r4-r5}
22 stmdb sp!, {r4-r5}
37 ldrb r5, [r0, #1]
43 strb r5, [r2, #1]
46 ldrb r5, [r0, #3]
51 strb r5, [r2, #3]
54 ldrb r5, [r0, #5]
57 strb r5, [r2, #5]
60 ldrb r5, [r0, #7]
65 strb r5, [r2, #7
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| prefix.s | 10 move.b [r5],r4
16 move.b [r5],r4
22 move.b [r5],r4
28 move.b [r5],r4
40 bdap.b 1,r5
41 move.b [r5],r4
55 bdap.w 1,r5
56 move.b [r5],r4
74 move.b [r5],r4
77 move.w [r5+],r
[all...] |
| /bionic/libc/arch-arm/syscalls/ |
| ___fsetxattr.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| ___mremap.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __arm_fadvise64_64.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __epoll_pwait.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __llseek.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __mmap2.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __ppoll.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __preadv64.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __pselect6.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __pwritev64.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| __waitid.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| fallocate64.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| fchownat.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| getsockopt.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
| linkat.S | 7 stmfd sp!, {r4, r5, r6, r7}
10 .cfi_rel_offset r5, 4
13 ldmfd ip, {r4, r5, r6}
16 ldmfd sp!, {r4, r5, r6, r7}
|
