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  /frameworks/av/media/libstagefright/codecs/mp3dec/src/asm/
pvmp3_mdct_18_gcc.s 47 mov r6,r1
143 ldr r3,[r6,r4,lsl #2]
153 str r2,[r6,r4,lsl #2]
161 ldr r2,[r6,#0x18]
170 ldr r2,[r6,#0x1c]
172 str r3,[r6,#0x18]
176 str r0,[r6,#0x1c]
178 ldr r0,[r6,#0x20]
189 str r1,[r6,#0x20]
195 ldr r3,[r6,#0x24
    [all...]
  /external/sonivox/arm-wt-22k/lib_src/
ARM-E_mastergain_gnu.s 68 STMFD sp!,{r4-r6,r14} @Save any save-on-entry registers that are used
70 LDR r6, =0x7fff @constant for saturation tests
79 CMP r4, r6 @check for positive saturation
80 MOVGT r4, r6 @saturate
81 CMN r4, r6 @check for negative saturation
82 MVNLT r4, r6 @saturate
88 CMP r5, r6 @check for positive saturation
89 MOVGT r5, r6 @saturate
90 CMN r5, r6 @check for negative saturation
91 MVNLT r5, r6 @saturate
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/
vp8_variance16x16_armv6.asm 43 usub8 r6, r4, r5 ; calculate difference
45 sel r7, r6, lr ; select bytes with positive difference
48 sel r6, r9, lr ; select bytes with negative difference
52 usad8 r5, r6, lr ; calculate sum of negative differences
53 orr r6, r6, r7 ; differences of all 4 pixels
59 uxtb16 r5, r6 ; byte (two pixels) to halfwords
60 uxtb16 r10, r6, ror #8 ; another two pixels to halfwords
68 usub8 r6, r4, r5 ; calculate difference
69 sel r7, r6, lr ; select bytes with positive differenc
    [all...]
intra4x4_predict_v6.asm 56 ldrb r6, [r1], r2 ; Left[2]
62 add r4, r4, r6
86 ldrb r6, [r1], r2 ; Left[2]
99 add r6, r6, r6, lsl #16 ; l[2|2]
116 sadd16 r1, r6, r10 ; l[2|2] + a[2|0] - [tl|tl]
117 sadd16 r2, r6, r11 ; l[2|2] + a[3|1] - [tl|tl]
180 ldrb r6, [r1], r2 ; Left[2]
185 add r10, r5, r6 ; l[1] + l[2
    [all...]
  /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/
syn_filt_opt.s 47 LDRH r6, [r4], #2
56 STRH r6, [r5], #2
65 LDRH r6, [r4], #2
74 STRH r6, [r5], #2
90 LDRSH r6, [r0, #2] @ load a[1]
94 AND r6, r6, r14
96 ORR r10, r6, r7, LSL #16 @ -a[2] -- -a[1]
101 LDRSH r6, [r0, #10] @ load a[5]
105 AND r6, r6, r1
    [all...]
Filt_6k_7k_opt.s 53 ADD r6, r13, #60 @ get x[L_FIR - 1] address
64 STRH r8, [r6], #2
65 STRH r9, [r6], #2
66 STRH r11, [r6], #2
67 STRH r12, [r6], #2
76 STRH r8, [r6], #2
77 STRH r9, [r6], #2
78 STRH r11, [r6], #2
79 STRH r12, [r6], #2
95 LDRSH r6, [r4, #2] @ load x[i + 1
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv5te/
vp8_packtokens_partitions_armv5.asm 51 ldr r6, _VP8_COMMON_MBrows_
54 ldr r5, [r4, r6] ; load up mb_rows
110 ldrb r6, [r1, #tokenextra_token] ; t
113 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
118 ldr r6, [r4, #vp8_token_value] ; v
130 lsl r12, r6, r4 ; r12 = v << 32 - n
141 mul r6, r4, r7 ; ((range-1) * pp[i>>1]))
149 add r4, r7, r6, lsr #8 ; 1 + (((range-1) * pp[i>>1]) >> 8)
155 clz r6, r4
156 sub r6, r6, #24 ; shif
    [all...]
vp8_packtokens_armv5.asm 60 ldrb r6, [r1, #tokenextra_token] ; t
63 add r4, r4, r6, lsl #3 ; a = vp8_coef_encodings + t
68 ldr r6, [r4, #vp8_token_value] ; v
80 lsl r12, r6, r4 ; r12 = v << 32 - n
91 mul r6, r4, r7 ; ((range-1) * pp[i>>1]))
99 add r4, r7, r6, lsr #8 ; 1 + (((range-1) * pp[i>>1]) >> 8)
105 clz r6, r4
106 sub r6, r6, #24 ; shift
110 adds r3, r3, r6 ; count += shif
    [all...]
  /external/libhevc/common/arm/
ihevc_inter_pred_chroma_copy.s 93 @ r6 => wd
130 add r6,r1,r3 @pu1_dst_tmp += dst_strd
134 vst1.32 {d0[0]},[r6],r3 @vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0)
137 vst1.32 {d0[0]},[r6],r3 @vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0)
140 vst1.32 {d0[0]},[r6],r3 @vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0)
146 sub r1,r6,r11 @pu1_dst = pu1_dst_tmp
162 add r6,r1,r3 @pu1_dst_tmp += dst_strd
166 vst1.32 {d0[0]},[r6],r3 @vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0)
184 add r6,r1,r3 @pu1_dst_tmp += dst_strd
187 vst1.8 {d1},[r6],r3 @vst1_u8(pu1_dst_tmp, tmp_src
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/
inst.d 120 370: 043061c8 843461c8 ld2h.s r6, @\(r7, r8\) -> ld2h.s r6, @\(r7\+, r8\)
121 378: 043c61c8 843861da ld2h.s r6, @\(r7-, r8\) -> ld2h.s r6, @\(r7, 0x1a\)
122 380: 843861c0 80001234 ld2h.l r6, @\(r7, 0x1234\)
123 388: 046061c8 846461c8 ld2w.s r6, @\(r7, r8\) -> ld2w.s r6, @\(r7\+, r8\)
124 390: 046c61c8 846861da ld2w.s r6, @\(r7-, r8\) -> ld2w.s r6, @\(r7, 0x1a\)
125 398: 846861c0 80001234 ld2w.l r6, @\(r7, 0x1234\
    [all...]
  /external/libvpx/libvpx/vp8/encoder/arm/armv6/
vp8_short_fdct4x4_armv6.asm 34 qadd16 r6, r4, r5 ; [i1+i2 | i0+i3] = [b1 | a1] without shift
43 smuad r4, r6, lr ; o0 = (i1+i2)*8 + (i0+i3)*8
44 smusd r5, r6, lr ; o2 = (i1+i2)*8 - (i0+i3)*8
46 smlad r6, r7, r12, r11 ; o1 = (c1 * 2217 + d1 * 5352 + 14500)
51 pkhbt r3, r4, r6, lsl #4 ; [o1 | o0], keep in register for PART 2
52 pkhbt r6, r5, r7, lsl #4 ; [o3 | o2]
54 str r6, [r1, #4]
59 qadd16 r6, r8, r9 ; [i5+i6 | i4+i7] = [b1 | a1] without shift
68 smuad r9, r6, lr ; o4 = (i5+i6)*8 + (i4+i7)*8
69 smusd r8, r6, lr ; o6 = (i5+i6)*8 - (i4+i7)*
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/arm/armv6/
vp8_short_fdct4x4_armv6.asm 34 qadd16 r6, r4, r5 ; [i1+i2 | i0+i3] = [b1 | a1] without shift
43 smuad r4, r6, lr ; o0 = (i1+i2)*8 + (i0+i3)*8
44 smusd r5, r6, lr ; o2 = (i1+i2)*8 - (i0+i3)*8
46 smlad r6, r7, r12, r11 ; o1 = (c1 * 2217 + d1 * 5352 + 14500)
51 pkhbt r3, r4, r6, lsl #4 ; [o1 | o0], keep in register for PART 2
52 pkhbt r6, r5, r7, lsl #4 ; [o3 | o2]
54 str r6, [r1, #4]
59 qadd16 r6, r8, r9 ; [i5+i6 | i4+i7] = [b1 | a1] without shift
68 smuad r9, r6, lr ; o4 = (i5+i6)*8 + (i4+i7)*8
69 smusd r8, r6, lr ; o6 = (i5+i6)*8 - (i4+i7)*
    [all...]
  /external/llvm/test/MC/ARM/
eh-directive-save-diagnostics.s 18 .save {r4, r5, r6, r7}
20 @ CHECK: .save {r4, r5, r6, r7}
37 .save {r4, r5, r6, r7}
39 @ CHECK: .save {r4, r5, r6, r7}
invalid-vector-index.s 3 ldrd r6, r7 [r2, #15]
thumb2-exception-return-mclass.s 10 # CHECK-NEXT: rfeia r6
11 rfeia r6
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
archv6m.s 8 msr apsr_nzcvq,r6
mrs-msr-arm-v6.d 10 0+08 <[^>]*> e14f6000 mrs r6, SPSR
16 0+20 <[^>]*> e169f006 msr SPSR_fc, r6
mrs-msr-arm-v7-a.d 10 0+08 <[^>]*> e14f6000 mrs r6, SPSR
16 0+20 <[^>]*> e169f006 msr SPSR_fc, r6
mrs-msr-thumb-v6t2.d 12 0+08 <[^>]*> f3ff 8600 mrs r6, SPSR
15 0+14 <[^>]*> f396 8900 msr SPSR_fc, r6
thumbv6.s 11 revsh r3, r6
17 uxtb r5, r6
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/
cbitw_test.s 26 cbitw $3,[r12]0xa7a(r6,r5)
27 cbitw $3,[r12]0xa7a(r7,r6)
34 cbitw $3,[r13]0xa7a(r6,r5)
35 cbitw $3,[r13]0xa7a(r7,r6)
39 cbitw $1,[r12]0x17a(r6,r5)
40 cbitw $1,[r13]0x134(r6,r5)
43 cbitw $3,[r12]0xabcd(r6,r5)
44 cbitw $3,[r13]0xbcde(r6,r5)
49 cbitw $13,[r12]0xa7a(r6,r5)
50 cbitw $13,[r12]0xa7a(r7,r6)
    [all...]
jal_test.s 8 jal (r6,r5),(r2,r1)
sbitw_test.s 26 sbitw $3,[r12]0xa7a(r6,r5)
27 sbitw $3,[r12]0xa7a(r7,r6)
34 sbitw $3,[r13]0xa7a(r6,r5)
35 sbitw $3,[r13]0xa7a(r7,r6)
39 sbitw $1,[r12]0x17a(r6,r5)
40 sbitw $1,[r13]0x134(r6,r5)
43 sbitw $3,[r12]0xabcd(r6,r5)
44 sbitw $3,[r13]0xbcde(r6,r5)
49 sbitw $13,[r12]0xa7a(r6,r5)
50 sbitw $13,[r12]0xa7a(r7,r6)
    [all...]
scc_test.s 12 sls r6
tbitw_test.s 26 tbitw $3,[r12]0xa7a(r6,r5)
27 tbitw $3,[r12]0xa7a(r7,r6)
34 tbitw $3,[r13]0xa7a(r6,r5)
35 tbitw $3,[r13]0xa7a(r7,r6)
39 tbitw $1,[r12]0x17a(r6,r5)
40 tbitw $1,[r13]0x134(r6,r5)
43 tbitw $3,[r12]0xabcd(r6,r5)
44 tbitw $3,[r13]0xbcde(r6,r5)
49 tbitw $13,[r12]0xa7a(r6,r5)
50 tbitw $13,[r12]0xa7a(r7,r6)
    [all...]

Completed in 256 milliseconds

1 2 3 4 5 6 78 91011>>