| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/arm/neon/ |
| vp9_idct16x16_add_neon.asm | 107 vqrshrn.s32 d8, q2, #14 ; >> 14
108 vqrshrn.s32 d9, q3, #14 ; >> 14
111 vqrshrn.s32 d14, q5, #14 ; >> 14
112 vqrshrn.s32 d15, q6, #14 ; >> 14
140 vqrshrn.s32 d10, q2, #14 ; >> 14
141 vqrshrn.s32 d11, q3, #14 ; >> 14
144 vqrshrn.s32 d12, q9, #14 ; >> 14
145 vqrshrn.s32 d13, q15, #14 ; >> 14
166 vadd.s32 q3, q2, q0
167 vadd.s32 q12, q11, q
[all...] |
| vp9_iht4x4_add_neon.asm | 37 vqrshrn.s32 d26, q13, #14
38 vqrshrn.s32 d27, q14, #14
39 vqrshrn.s32 d29, q15, #14
40 vqrshrn.s32 d28, q10, #14
70 vadd.s32 q10, q10, q13 ; x0 = s0 + s3 + s5
71 vadd.s32 q10, q10, q8
72 vsub.s32 q11, q11, q14 ; x1 = s1 - s4 - s6
74 vsub.s32 q11, q11, q9
75 vmul.s32 q15, q15, q8 ; x2 = sinpi_3_9 * s7
77 vadd.s32 q13, q10, q12 ; s0 = x0 + x
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-absdiff-encoding.s | 7 @ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0xa1,0x07,0x60,0xf2]
8 vabd.s32 d16, d16, d17
21 @ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0xe2,0x07,0x60,0xf2]
22 vabd.s32 q8, q8, q9
36 @ CHECK: vabdl.s32 q8, d16, d17 @ encoding: [0xa1,0x07,0xe0,0xf2]
37 vabdl.s32 q8, d16, d17
49 @ CHECK: vaba.s32 d16, d18, d17 @ encoding: [0xb1,0x07,0x62,0xf2]
50 vaba.s32 d16, d18, d17
61 @ CHECK: vaba.s32 q9, q8, q10 @ encoding: [0xf4,0x27,0x60,0xf2]
62 vaba.s32 q9, q8, q1
[all...] |
| neont2-absdiff-encoding.s | 7 vabd.s32 d16, d16, d17
14 vabd.s32 q8, q8, q9
22 @ CHECK: vabd.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x07]
29 @ CHECK: vabd.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x07]
38 vabdl.s32 q8, d16, d17
45 @ CHECK: vabdl.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x07]
53 vaba.s32 d16, d18, d17
59 vaba.s32 q9, q8, q10
66 @ CHECK: vaba.s32 d16, d18, d17 @ encoding: [0x62,0xef,0xb1,0x07]
72 @ CHECK: vaba.s32 q9, q8, q10 @ encoding: [0x60,0xef,0xf4,0x27
[all...] |
| neont2-mul-encoding.s | 31 vqdmulh.s32 d16, d16, d17
33 vqdmulh.s32 q8, q8, q9
37 @ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0b]
39 @ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0b]
44 vqrdmulh.s32 d16, d16, d17
46 vqrdmulh.s32 q8, q8, q9
49 @ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0b]
51 @ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x0b]
56 vmull.s32 q8, d16, d17
64 @ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0c
[all...] |
| neont2-pairwise-encoding.s | 17 vpaddl.s32 d9, d12
23 vpaddl.s32 q6, q5
30 @ CHECK: vpaddl.s32 d9, d12 @ encoding: [0xb8,0xff,0x0c,0x92]
36 @ CHECK: vpaddl.s32 q6, q5 @ encoding: [0xb8,0xff,0x4a,0xc2]
44 vpadal.s32 d18, d1
50 vpadal.s32 q6, q12
57 @ CHECK: vpadal.s32 d18, d1 @ encoding: [0xf8,0xff,0x01,0x26]
63 @ CHECK: vpadal.s32 q6, q12 @ encoding: [0xb8,0xff,0x68,0xc6]
71 vpmin.s32 d18, d27, d12
79 @ CHECK: vpmin.s32 d18, d27, d12 @ encoding: [0x6b,0xef,0x9c,0x2a
[all...] |
| neon-satshift-encoding.s | 7 @ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xf2]
8 vqshl.s32 d16, d16, d17
23 @ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xf2]
24 vqshl.s32 q8, q8, q9
39 @ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xf2]
40 vqshl.s32 d16, d16, #31
55 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xf3]
56 vqshlu.s32 d16, d16, #31
63 @ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xf2]
64 vqshl.s32 q8, q8, #3
[all...] |
| neont2-satshift-encoding.s | 9 @ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0x61,0xef,0xb0,0x04]
10 vqshl.s32 d16, d16, d17
25 @ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0x62,0xef,0xf0,0x04]
26 vqshl.s32 q8, q8, q9
41 @ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0xff,0xef,0x30,0x07]
42 vqshl.s32 d16, d16, #31
57 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x06]
58 vqshlu.s32 d16, d16, #31
65 @ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0xff,0xef,0x70,0x07]
66 vqshl.s32 q8, q8, #3
[all...] |
| fp-armv8.s | 28 vcvta.s32.f32 s2, s3
29 @ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xe1,0x1a,0xbc,0xfe]
30 vcvta.s32.f64 s2, d3
31 @ CHECK: vcvta.s32.f64 s2, d3 @ encoding: [0xc3,0x1b,0xbc,0xfe]
32 vcvtn.s32.f32 s6, s23
33 @ CHECK: vcvtn.s32.f32 s6, s23 @ encoding: [0xeb,0x3a,0xbd,0xfe]
34 vcvtn.s32.f64 s6, d23
35 @ CHECK: vcvtn.s32.f64 s6, d23 @ encoding: [0xe7,0x3b,0xbd,0xfe]
36 vcvtp.s32.f32 s0, s4
37 @ CHECK: vcvtp.s32.f32 s0, s4 @ encoding: [0xc2,0x0a,0xbe,0xfe
[all...] |
| neon-bitcount-encoding.s | 23 @ CHECK: vcls.s32 d16, d16 @ encoding: [0x20,0x04,0xf8,0xf3]
24 vcls.s32 d16, d16
29 @ CHECK: vcls.s32 q8, q8 @ encoding: [0x60,0x04,0xf8,0xf3]
30 vcls.s32 q8, q8
|
| neon-minmax-encoding.s | 5 vmax.s32 d7, d8, d9
13 vmax.s32 d8, d9
21 vmax.s32 q7, q8, q9
29 vmax.s32 q8, q9
37 @ CHECK: vmax.s32 d7, d8, d9 @ encoding: [0x09,0x76,0x28,0xf2]
44 @ CHECK: vmax.s32 d8, d8, d9 @ encoding: [0x09,0x86,0x28,0xf2]
51 @ CHECK: vmax.s32 q7, q8, q9 @ encoding: [0xe2,0xe6,0x20,0xf2]
58 @ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0xe2,0x06,0x60,0xf2]
67 vmin.s32 d7, d8, d9
75 vmin.s32 d8, d
[all...] |
| neont2-bitcount-encoding.s | 27 vcls.s32 d16, d16
30 vcls.s32 q8, q8
34 @ CHECK: vcls.s32 d16, d16 @ encoding: [0xf8,0xff,0x20,0x04]
37 @ CHECK: vcls.s32 q8, q8 @ encoding: [0xf8,0xff,0x60,0x04]
|
| neont2-minmax-encoding.s | 7 vmax.s32 d7, d8, d9
15 vmax.s32 d8, d9
23 vmax.s32 q7, q8, q9
31 vmax.s32 q8, q9
39 @ CHECK: vmax.s32 d7, d8, d9 @ encoding: [0x28,0xef,0x09,0x76]
46 @ CHECK: vmax.s32 d8, d8, d9 @ encoding: [0x28,0xef,0x09,0x86]
53 @ CHECK: vmax.s32 q7, q8, q9 @ encoding: [0x20,0xef,0xe2,0xe6]
60 @ CHECK: vmax.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x06]
69 vmin.s32 d7, d8, d9
77 vmin.s32 d8, d
[all...] |
| thumb-fp-armv8.s | 31 vcvta.s32.f32 s2, s3
32 @ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x1a]
33 vcvta.s32.f64 s2, d3
34 @ CHECK: vcvta.s32.f64 s2, d3 @ encoding: [0xbc,0xfe,0xc3,0x1b]
35 vcvtn.s32.f32 s6, s23
36 @ CHECK: vcvtn.s32.f32 s6, s23 @ encoding: [0xbd,0xfe,0xeb,0x3a]
37 vcvtn.s32.f64 s6, d23
38 @ CHECK: vcvtn.s32.f64 s6, d23 @ encoding: [0xbd,0xfe,0xe7,0x3b]
39 vcvtp.s32.f32 s0, s4
40 @ CHECK: vcvtp.s32.f32 s0, s4 @ encoding: [0xbe,0xfe,0xc2,0x0a
[all...] |
| neon-mul-encoding.s | 51 vqdmulh.s32 d16, d16, d17
53 vqdmulh.s32 q8, q8, q9
55 vqdmulh.s32 d16, d17
57 vqdmulh.s32 q8, q9
61 @ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf2]
63 @ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf2]
65 @ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0xa1,0x0b,0x60,0xf2]
67 @ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0xe2,0x0b,0x60,0xf2]
72 vqrdmulh.s32 d16, d16, d17
74 vqrdmulh.s32 q8, q8, q
[all...] |
| neon-sub-encoding.s | 53 @ CHECK: vsubl.s32 q8, d17, d16 @ encoding: [0xa0,0x02,0xe1,0xf2]
54 vsubl.s32 q8, d17, d16
65 @ CHECK: vsubw.s32 q8, q8, d18 @ encoding: [0xa2,0x03,0xe0,0xf2]
66 vsubw.s32 q8, q8, d18
77 @ CHECK: vhsub.s32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf2]
78 vhsub.s32 d16, d16, d17
89 @ CHECK: vhsub.s32 q8, q8, q9 @ encoding: [0xe2,0x02,0x60,0xf2]
90 vhsub.s32 q8, q8, q9
95 @ CHECK: vqsub.s32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf2]
96 vqsub.s32 d16, d16, d1
[all...] |
| neon-shift-encoding.s | 49 vshr.s32 d16, d16, #31
53 vshr.s32 q8, q8, #31
66 @ CHECK: vshr.s32 d16, d16, #31 @ encoding: [0x30,0x00,0xe1,0xf2]
70 @ CHECK: vshr.s32 q8, q8, #31 @ encoding: [0x70,0x00,0xe1,0xf2]
84 vshr.s32 d16, #31
88 vshr.s32 q8, #31
101 @ CHECK: vshr.s32 d16, d16, #31 @ encoding: [0x30,0x00,0xe1,0xf2]
105 @ CHECK: vshr.s32 q8, q8, #31 @ encoding: [0x70,0x00,0xe1,0xf2]
111 vsra.s32 d11, d10, #31
115 vsra.s32 q3, q6, #3
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_itrans_recon_16x16.s | 370 vadd.s32 q10,q6,q12
371 vsub.s32 q11,q6,q12
373 vadd.s32 q6,q7,q13
374 vsub.s32 q12,q7,q13
376 vadd.s32 q7,q8,q14
377 vsub.s32 q13,q8,q14
380 vadd.s32 q8,q9,q15
381 vsub.s32 q14,q9,q15
389 vqrshrn.s32 d30,q10,#shift_stage1_idct @// r0 = (a0 + b0 + rnd) >> 7(shift_stage1_idct)
390 vqrshrn.s32 d19,q11,#shift_stage1_idct @// r7 = (a0 - b0 + rnd) >> 7(shift_stage1_idct
[all...] |
| ihevc_itrans_recon_32x32.s | 484 vadd.s32 q4,q10,q12
485 vsub.s32 q5,q10,q12
487 vadd.s32 q6,q11,q13
488 vsub.s32 q12,q11,q13
490 vadd.s32 q7,q8,q14
491 vsub.s32 q13,q8,q14
494 vadd.s32 q8,q9,q15
495 vsub.s32 q14,q9,q15
498 vqrshrn.s32 d30,q4,#shift_stage1_idct @// r0 = (a0 + b0 + rnd) >> 7(shift_stage1_idct)
499 vqrshrn.s32 d19,q5,#shift_stage1_idct @// r7 = (a0 - b0 + rnd) >> 7(shift_stage1_idct
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| armv8-a+simd.s | 22 vcvta.s32.f32 d0, d0
23 vcvtn.s32.f32 d16, d16
26 vcvta.s32.f32 q0, q0
27 vcvtn.s32.f32 q8, q8
60 vcvta.s32.f32 d0, d0
61 vcvtn.s32.f32 d16, d16
64 vcvta.s32.f32 q0, q0
65 vcvtn.s32.f32 q8, q8
|
| neon-cov.s | 39 regs3_1 \op \opq .s32
53 regs3_1 \op \opq .s32
78 regs2i_1 \op \opq \imm .s32
90 regs2i_1 \op \opq \imm .s32
122 logic_imm_1 \op \opq 0x000000ff .s32
145 logic_imm_1 \op \opq 0xffffff00 .s32
167 regs3_1 \op \opq .s32
178 regs3_1 \op \opq .s32
197 regs2i_1 \op \opq 0 .s32
210 regs2i_1 \op \opq 0 .s32
[all...] |
| neon-omit.d | 9 0[0-9a-f]+ <[^>]+> f26cc0c6 vhadd\.s32 q14, q14, q3
10 0[0-9a-f]+ <[^>]+> f2222144 vrhadd\.s32 q1, q1, q2
11 0[0-9a-f]+ <[^>]+> f22aa24e vhsub\.s32 q5, q5, q7
23 0[0-9a-f]+ <[^>]+> f2211a03 vpmax\.s32 d1, d1, d3
24 0[0-9a-f]+ <[^>]+> f2255a17 vpmin\.s32 d5, d5, d7
28 0[0-9a-f]+ <[^>]+> f3255b07 vqrdmulh\.s32 d5, d5, d7
31 0[0-9a-f]+ <[^>]+> f2255017 vqadd\.s32 d5, d5, d7
44 0[0-9a-f]+ <[^>]+> f2a66304 vsubw\.s32 q3, q3, d4
55 0[0-9a-f]+ <[^>]+> f262c0c6 vhadd\.s32 q14, q9, q3
56 0[0-9a-f]+ <[^>]+> f22a2144 vrhadd\.s32 q1, q5, q
[all...] |
| vcvt-bad.l | 25 [^:]*:30: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f64.s32 d1,d1,#0'
26 [^:]*:31: Error: immediate value out of range -- `vcvt.f64.s32 d1,d1,#33'
30 [^:]*:36: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f32.s32 s1,s1,#0'
31 [^:]*:37: Error: immediate value out of range -- `vcvt.f32.s32 s1,s1,#33'
35 [^:]*:42: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.s32.f64 d1,d1,#0'
36 [^:]*:43: Error: immediate value out of range -- `vcvt.s32.f64 d1,d1,#33'
40 [^:]*:48: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.s32.f32 s1,s1,#0'
41 [^:]*:49: Error: immediate value out of range -- `vcvt.s32.f32 s1,s1,#33'
|
| vfpv3-const-conv.d | 16 0[0-9a-f]+ <[^>]+> eefa8aeb (vcvt\.f32\.s32 s17, s17, #9|fsltos s17, #9)
17 0[0-9a-f]+ <[^>]+> eefa1beb (vcvt\.f64\.s32 d17, d17, #9|fsltod d17, #9)
24 0[0-9a-f]+ <[^>]+> eefe9aec (vcvt\.s32\.f32 s19, s19, #7|ftosls s19, #7)
25 0[0-9a-f]+ <[^>]+> eefe3bec (vcvt\.s32\.f64 d19, d19, #7|ftosld d19, #7)
|
| /external/libavc/common/arm/ |
| ih264_iquant_itrans_recon_a9.s | 125 vdup.s32 q15, r7 @Populate the u4_qp_div_6 in Q15
152 vshl.s32 q0, q0, q15 @ Q0 = q[i] = (p[i] << (qP/6)) where i = 0..3
153 vshl.s32 q1, q1, q15 @ Q1 = q[i] = (p[i] << (qP/6)) where i = 4..7
154 vshl.s32 q2, q2, q15 @ Q2 = q[i] = (p[i] << (qP/6)) where i = 8..11
155 vshl.s32 q3, q3, q15 @ Q3 = q[i] = (p[i] << (qP/6)) where i = 12..15
157 vqrshrn.s32 d0, q0, #0x4 @ D0 = c[i] = ((q[i] + 32) >> 4) where i = 0..3
158 vqrshrn.s32 d1, q1, #0x4 @ D1 = c[i] = ((q[i] + 32) >> 4) where i = 4..7
159 vqrshrn.s32 d2, q2, #0x4 @ D2 = c[i] = ((q[i] + 32) >> 4) where i = 8..11
160 vqrshrn.s32 d3, q3, #0x4 @ D3 = c[i] = ((q[i] + 32) >> 4) where i = 12..15
305 vdup.s32 q15, r7 @Populate the u4_qp_div_6 in Q1
[all...] |
