| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips64r2-ill.s | 153 # dinsu instruction position/size checks
156 dinsu $4, $5, 31, 1 # error (position)
157 dinsu $4, $5, 32, 1
158 dinsu $4, $5, 63, 1
159 dinsu $4, $5, 64, 1 # error (position)
162 dinsu $4, $5, 32, 0 # error (size)
163 dinsu $4, $5, 32, 1
164 dinsu $4, $5, 32, 32
165 dinsu $4, $5, 32, 33 # error (size)
168 dinsu $4, $5, 32,
[all...] |
| mips64r2.s | 29 # "dinsu" as appropriate. Also, add some explicit tests of the
38 dins $2, $3, 32, 1 # dinsu
39 dins $2, $3, 32, 32 # dinsu
40 dins $2, $3, 63, 1 # dinsu
42 dinsu $2, $3, 42, 12
|
| mips64r2-ill.l | 48 .*:156: Error: operand 3 out of range `dinsu \$4,\$5,31,1'
49 .*:159: Error: operand 3 out of range `dinsu \$4,\$5,64,1'
50 .*:162: Error: operand 4 out of range `dinsu \$4,\$5,32,0'
51 .*:165: Error: operand 4 out of range `dinsu \$4,\$5,32,33'
52 .*:175: Error: operand 4 out of range `dinsu \$4,\$5,33,32'
53 .*:178: Error: operand 4 out of range `dinsu \$4,\$5,62,31'
54 .*:179: Error: operand 4 out of range `dinsu \$4,\$5,62,32'
55 .*:181: Error: operand 4 out of range `dinsu \$4,\$5,63,2'
56 .*:182: Error: operand 4 out of range `dinsu \$4,\$5,63,31'
57 .*:183: Error: operand 4 out of range `dinsu \$4,\$5,63,32
[all...] |
| /external/valgrind/none/tests/mips64/ |
| extract_insert_bit_field.c | [all...] |
| extract_insert_bit_field.stdout.exp-mips64r2 | [all...] |
| /art/runtime/interpreter/mterp/mips64/ |
| op_const_wide.S | 10 dinsu a0, a2, 32, 32 # a0 = HHHHhhhhBBBBbbbb
|
| op_iget_wide_quick.S | 10 dinsu a0, a1, 32, 32
|
| op_aget_wide.S | 18 dinsu a2, a3, 32, 32 # a2 <- vBB[vCC]
|
| header.S | 224 dinsu \reg, AT, 32, 32
|
| /external/llvm/test/MC/Mips/ |
| mips64extins.ll | 49 define i64 @dinsu(i64 %i, i64 %j) nounwind readnone {
51 ; CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 8, 13
|
| /system/core/libpixelflinger/arch-mips64/ |
| col32cb16blend.S | 86 dinsu $a6,$t8,32,16
87 dinsu $a6,$t9,48,16
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64extins.ll | 47 define i64 @dinsu(i64 %i, i64 %j) nounwind readnone {
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| invalid.s | 31 dinsu $2, $3, 31, 1 # CHECK: :[[@LINE]]:23: error: expected immediate in range 32 .. 63
32 dinsu $2, $3, 64, 1 # CHECK: :[[@LINE]]:23: error: expected immediate in range 32 .. 63
|
| /system/core/libpixelflinger/tests/arch-mips64/disassembler/ |
| mips64_disassembler_test.cpp | 66 { 0x7fbe0806, "dinsu\ts8,sp,32,2" },
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| invalid.s | 41 dinsu $2, $3, 31, 1 # CHECK: :[[@LINE]]:17: error: expected immediate in range 32 .. 63
42 dinsu $2, $3, 64, 1 # CHECK: :[[@LINE]]:17: error: expected immediate in range 32 .. 63
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 103 // DEXTU/DINSU
105 InstIn.setOpcode((Opcode == Mips::DEXT) ? Mips::DEXTU : Mips::DINSU);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips64InstrInfo.td | 288 def DINSU : InsBase<"dinsu", GPR64Opnd, uimm5_plus32>, EXT_FM<6>;
|
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 157 void Dinsu(GpuRegister rt, GpuRegister rs, int pos, int size); // MIPS64
|
| assembler_mips64_test.cc | 873 TEST_F(AssemblerMIPS64Test, Dinsu) {
[all...] |
| assembler_mips64.cc | 309 void Mips64Assembler::Dinsu(GpuRegister rt, GpuRegister rs, int pos, int size) {
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| mips64_disassem.c | 330 db_printf("dinsu\t%s,%s,%d,%d",
|
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| mips.h | 814 "+E" 5 bit dinsu/dextu position, which becomes LSB-32 (OP_*_SHAMT).
816 "+F" 5 bit "dinsm/dinsu" size, which becomes MSB-32 (OP_*_INSMSB).
[all...] |
| /external/v8/src/mips64/ |
| constants-mips64.h | 494 DINSU = ((0U << 3) + 6),
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| ChangeLog-2013 | 273 macro entries with "dextm", "dextu", "dinsm" and "dinsu" aliases.
[all...] |
| micromips-opc.c | [all...] |
