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  /toolchain/binutils/binutils-2.25/cpu/
xstormy16.cpu 307 (name f-imm12)
314 (dnop imm12 "12 bit signed immediate" () h-sint f-imm12)
698 ("mov$ws2 $Rdm,($Rs,$imm12)")
699 (+ OP1_7 OP2A_0 ws2 Rs OP4M_1 Rdm OP5_0 imm12)
701 (set-psw Rdm (index-of Rdm) (alignfix-mem (add Rs imm12)) ws2)
702 (set-psw Rdm (index-of Rdm) (and #xFF (mem QI (add Rs imm12))) ws2))
709 ("mov$ws2 $Rdm,($Rs++,$imm12)")
710 (+ OP1_6 OP2A_0 ws2 Rs OP4M_1 Rdm OP5_0 imm12)
713 (set-psw Rdm (index-of Rdm) (alignfix-mem (add Rs imm12)) ws2
    [all...]
epiphany.opc 128 /* Handle simm3/simm11/imm3/imm12. */
  /toolchain/binutils/binutils-2.25/opcodes/
xstormy16-opc.c 247 /* mov$ws2 $Rdm,($Rs,$imm12) */
250 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ',', OP (IMM12), ')', 0 } },
253 /* mov$ws2 $Rdm,($Rs++,$imm12) */
256 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } },
259 /* mov$ws2 $Rdm,(--$Rs,$imm12) */
262 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } },
265 /* mov$ws2 ($Rs,$imm12),$Rdm */
268 { { MNEM, OP (WS2), ' ', '(', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
271 /* mov$ws2 ($Rs++,$imm12),$Rdm */
274 { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } }
    [all...]
xstormy16-desc.c 282 { XSTORMY16_F_IMM12, "f-imm12", 0, 32, 20, 12, { 0, { { { (1<<MACH_BASE), 0 } } } } },
413 /* imm12: 12 bit signed immediate */
414 { "imm12", XSTORMY16_OPERAND_IMM12, HW_H_SINT, 20, 12,
557 /* mov$ws2 $Rdm,($Rs,$imm12) */
562 /* mov$ws2 $Rdm,($Rs++,$imm12) */
567 /* mov$ws2 $Rdm,(--$Rs,$imm12) */
572 /* mov$ws2 ($Rs,$imm12),$Rdm */
577 /* mov$ws2 ($Rs++,$imm12),$Rdm */
582 /* mov$ws2 (--$Rs,$imm12),$Rdm */
647 /* movf$ws2 $Rdm,($Rb,$Rs,$imm12) */
    [all...]
d30v-opc.c 437 { SHORT_B3, 2, { Ra3, IMM12S3 } }, /* Ra,imm12 */
441 { SHORT_B3b, 3, { Ra3, IMM12S3 } }, /* Ra,imm12 */
  /art/disassembler/
disassembler_arm.cc 261 uint32_t imm12 = (instruction >> 8) & 0xfff; local
263 args << '#' << ((imm12 << 4) | imm4);
368 int32_t ThumbExpand(int32_t imm12) {
369 if ((imm12 & 0xC00) == 0) {
370 switch ((imm12 >> 8) & 3) {
372 return imm12 & 0xFF;
374 return ((imm12 & 0xFF) << 16) | (imm12 & 0xFF);
376 return ((imm12 & 0xFF) << 24) | ((imm12 & 0xFF) << 8)
1149 uint32_t imm12 = (i << 11) | (imm3 << 8) | imm8; local
1152 args << Rd << ", " << Rn << ", #" << imm12; local
1379 uint32_t imm12 = instr & 0xFFF; local
    [all...]
  /art/compiler/linker/arm64/
relative_patcher_arm64.cc 212 // ADD immediate, 64-bit with imm12 == 0 (unset).
216 // LDR 32-bit or 64-bit with imm12 == 0 (unset).
241 uint32_t imm12 = (disp & 0xfffu) >> shift; local
242 insn = (insn & ~(0xfffu << 10)) | (imm12 << 10);
relative_patcher_arm64_test.cc 174 use_insn |= 1 | // LDR x1, [x0, #(imm12 << 2)]
175 ((disp & 0xfffu) << (10 - 2)); // imm12 = ((disp & 0xfffu) >> 2) is at bit 10.
178 (disp & 0xfffu) << 10; // imm12 = (disp & 0xfffu) is at bit 10.
    [all...]
  /external/llvm/test/CodeGen/AArch64/
arm64-addrmode.ll 28 ; base + unsigned offset (> imm9 and <= imm12 * size of type in bytes)
38 ; base + unsigned offset (> imm12 * size of type in bytes)
  /external/llvm/lib/Target/ARM/MCTargetDesc/
ARMMCCodeEmitter.cpp 154 /// getAddrModeImm12OpValue - Return encoding info for 'reg +/- imm12'
242 /// getAddrModeThumbSPOpValue - Return encoding info for 'reg +/- imm12'
    [all...]
ARMAddressingModes.h 396 // addrmode2 := reg +/- imm12
407 static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO,
409 assert(Imm12 < (1 << 12) && "Imm too large!");
411 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64AsmBackend.cpp 154 report_fatal_error("invalid imm12 fixup value");
159 report_fatal_error("invalid imm12 fixup value");
164 report_fatal_error("invalid imm12 fixup value");
169 report_fatal_error("invalid imm12 fixup value");
174 report_fatal_error("invalid imm12 fixup value");
  /prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/arm/armasm/
decode.go 454 // Treat [<Rn>,#+/-<imm12>] like [<Rn>{,#+/-<imm12>}]{!}
459 // Treat [<Rn>],#+/-<imm12> like [<Rn>{,#+/-<imm12>}]{!}
tables.go     [all...]
  /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/arm/armasm/
decode.go 454 // Treat [<Rn>,#+/-<imm12>] like [<Rn>{,#+/-<imm12>}]{!}
459 // Treat [<Rn>],#+/-<imm12> like [<Rn>{,#+/-<imm12>}]{!}
tables.go     [all...]
  /external/valgrind/VEX/priv/
host_arm64_defs.c 305 ARM64RIA* ARM64RIA_I12 ( UShort imm12, UChar shift ) {
308 riA->ARM64riA.I12.imm12 = imm12;
310 vassert(imm12 < 4096);
324 vex_printf("#%u",(UInt)(riA->ARM64riA.I12.imm12
    [all...]
guest_arm64_toIR.c 5025 UInt imm12 = INSN(21,10); local
6403 UInt imm12 = INSN(21,10); local
    [all...]
host_arm64_defs.h 164 UShort imm12; /* 0 .. 4095 */ member in struct:__anon25532::__anon25533::__anon25534
174 extern ARM64RIA* ARM64RIA_I12 ( UShort imm12, UChar shift );
    [all...]
  /external/pcre/dist/sljit/
sljitNativeARM_T2_32.c 78 #define IMM12(imm) \
560 return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(imm));
562 return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(nimm));
599 return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(imm));
601 return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(nimm));
874 return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(value));
882 return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(value));
1026 return push_inst32(compiler, ADDWI | RD4(arg) | RN4(arg) | IMM12(argw));
    [all...]
  /external/llvm/lib/Target/AArch64/Disassembler/
AArch64ExternalSymbolizer.cpp 126 EncodedInst |= Value << 10; // imm12 [+ shift:2 for ADD]
  /external/v8/src/arm64/
assembler-arm64-inl.h 1142 Instr Assembler::ImmLSUnsigned(int imm12) {
1143 DCHECK(is_uint12(imm12));
1144 return imm12 << ImmLSUnsigned_offset;
    [all...]
  /external/llvm/lib/Target/ARM/
ARMInstrInfo.td     [all...]
ARMInstrFormats.td 664 // {11-0} imm12/Rm
682 // {11-0} imm12/Rm
701 // {13} 1 == Rm, 0 == imm12
703 // {11-0} imm12/Rm
    [all...]
  /toolchain/binutils/binutils-2.25/bfd/
elf32-epiphany.c 95 /* imm12 - sign-magnitude */

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