| /system/core/libpixelflinger/codeflinger/ |
| Arm64Disassembler.cpp | 52 {0xff800000, 0x72800000, "movk <wd>, #<imm2>, lsl #<shift3>"},
53 {0xff800000, 0x52800000, "movz <wd>, #<imm2>, lsl #<shift3>"},
54 {0xff800000, 0xd2800000, "movz <xd>, #<imm2>, lsl #<shift3>"},
138 else if(strcmp(token, "<imm2>") == 0)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| sp-pc-validations-bad-t.s | 241 @str.w pc,[r0,r1{,LSL #<imm2>}] @ Unpredictable
242 @str.w r1,[r0,sp{,LSL #<imm2>}] @ ditto
243 @str.w r1,[r0,pc{,LSL #<imm2>}] @ ditto
|
| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 1186 Instr Assembler::ImmBarrierDomain(int imm2) {
1187 DCHECK(is_uint2(imm2));
1188 return imm2 << ImmBarrierDomain_offset;
1192 Instr Assembler::ImmBarrierType(int imm2) {
1193 DCHECK(is_uint2(imm2));
1194 return imm2 << ImmBarrierType_offset;
[all...] |
| /toolchain/binutils/binutils-2.25/cpu/ |
| xstormy16.cpu | 277 (dnf f-imm2 "2 bit unsigned" () 10 2)
278 (dnop imm2 "2 bit unsigned immediate" () h-uint f-imm2)
[all...] |
| /external/ltrace/sysdeps/linux-gnu/arm/ |
| trace.c | 445 const unsigned imm2 = BITS(inst2, 0, 10); local
450 = ((imm1 << 12) + (imm2 << 1));
477 const unsigned imm2 = BITS(inst2, 0, 10); local
483 offset += (imm1 << 12) + (imm2 << 1);
|
| /art/disassembler/ |
| disassembler_arm.cc | 154 explicit RmLslImm2(uint32_t instr) : imm2((instr >> 4) & 0x3), rm(instr & 0xf) {}
155 uint32_t imm2; member in struct:art::arm::RmLslImm2
160 if (r.imm2 != 0) {
161 os << ", lsl #" << r.imm2;
693 uint32_t imm2 = ((instr >> 6) & 0x3); local
694 uint32_t imm5 = ((imm3 << 2) | imm2);
1179 uint32_t imm2 = (instr >> 6) & 0x3; local
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| xstormy16-opc.c | 589 /* inc $Rd,#$imm2 */
592 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } },
595 /* dec $Rd,#$imm2 */
598 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } },
|
| xstormy16-desc.c | 277 { XSTORMY16_F_IMM2, "f-imm2", 0, 32, 10, 2, { 0, { { { (1<<MACH_BASE), 0 } } } } },
389 /* imm2: 2 bit unsigned immediate */
390 { "imm2", XSTORMY16_OPERAND_IMM2, HW_H_UINT, 10, 2,
842 /* inc $Rd,#$imm2 */
847 /* dec $Rd,#$imm2 */
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonIntrinsics.td | 28 class T_II_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
29 : Pat<(IntID Imm1:$Is, Imm2:$It),
30 (MI Imm1:$Is, Imm2:$It)>;
56 class T_QII_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
57 : Pat <(IntID (i32 PredRegs:$Ps), Imm1:$Is, Imm2:$It),
58 (MI PredRegs:$Ps, Imm1:$Is, Imm2:$It)>;
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MicroMips32r6InstrFormats.td | 367 bits<2> imm2;
375 let Inst{10-9} = imm2;
|
| Mips32r6InstrFormats.td | 493 bits<2> imm2;
502 let Inst{7-6} = imm2;
|
| MicroMips32r6InstrInfo.td | 461 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
462 string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $rd, $imm2");
[all...] |
| Mips32r6InstrInfo.td | 595 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$imm2);
596 string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $imm2");
[all...] |
| /external/vixl/test/ |
| test-simulator-a64.cc | 175 const VRegister& vd, int imm1, const VRegister& vn, int imm2);
[all...] |
| /art/compiler/utils/x86_64/ |
| assembler_x86_64_test.cc | 115 x86_64::Immediate imm2(value);
116 EXPECT_FALSE(imm2.is_int8());
117 EXPECT_FALSE(imm2.is_int16());
118 EXPECT_FALSE(imm2.is_int32());
[all...] |
| /external/valgrind/none/tests/ppc32/ |
| test_dfp5.c | 239 typedef void (*test_funcp_t)(unsigned int imm, unsigned int imm2, dfp_val_t *valB);
|
| /art/compiler/utils/arm/ |
| assembler_arm.cc | 150 uint32_t imm2 = immed_ & 3U /* 0b11 */;
152 return imm3 << 12 | imm2 << 6 | shift_ << 4 |
[all...] |
| assembler_arm32_test.cc | 670 "sbfx{cond} {reg1}, {reg2}, #{imm1}, #{imm2}"), "sbfx");
694 "ubfx{cond} {reg1}, {reg2}, #{imm1}, #{imm2}"), "ubfx");
|
| assembler_thumb2.cc | 778 uint32_t imm2 = lsb & (B1 | B0); // Bits 0-1 of `lsb`. local
787 imm2 << 6 |
799 uint32_t imm2 = lsb & (B1 | B0); // Bits 0-1 of `lsb`. local
808 imm2 << 6 |
1816 uint32_t imm2 = amount & 3U \/* 0b11 *\/; local
[all...] |
| assembler_arm_test.h | 542 static constexpr const char* IMM2_TOKEN = "{imm2}";
|
| /external/pcre/dist/sljit/ |
| sljitNativeARM_32.c | 1182 sljit_uw imm2; local
[all...] |
| /external/vixl/src/vixl/a64/ |
| assembler-a64.h | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrThumb2.td | 265 // t2addrmode_so_reg := reg + (reg << imm2)
602 let Inst{7-6} = 0b00; // imm2
686 let Inst{7-6} = 0b00; // imm2
807 let Inst{7-6} = 0b00; // imm2
849 let Inst{7-6} = 0b00; // imm2
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| FastISel.h | 420 bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_peephole.cpp | 552 const int s, ImmediateValue& imm2)
558 float f = imm2.reg.data.f32;
574 // d = mul a, imm2 -> d = mul r, (imm1 * imm2)
[all...] |
