| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.cpp | 80 // contents of RDI, RDI + AccessSize * RCX, RSI, RSI + AccessSize *
119 bool IsSmallMemAccess(unsigned AccessSize) { return AccessSize < 8; }
212 virtual void InstrumentMemOperandSmall(X86Operand &Op, unsigned AccessSize,
216 virtual void InstrumentMemOperandLarge(X86Operand &Op, unsigned AccessSize,
221 virtual void InstrumentMOVSImpl(unsigned AccessSize, MCContext &Ctx,
224 void InstrumentMemOperand(X86Operand &Op, unsigned AccessSize, bool IsWrite,
228 unsigned AccessSize, MCContext &Ctx, MCStreamer &Out);
283 X86Operand &Op, unsigned AccessSize, bool IsWrite
[all...] |
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCELFStreamer.cpp | 88 // functions found in MCELFStreamer.cpp taking AccessSize as an additional
93 unsigned AccessSize) {
107 ((AccessSize == 0) || (Size == 0) || (Size > GPSize))
109 : sbss[(Log2_64(AccessSize))];
123 if ((AccessSize) && (Size <= GPSize)) {
125 (AccessSize <= GPSize)
126 ? ELF::SHN_HEXAGON_SCOMMON + (Log2_64(AccessSize) + 1)
137 unsigned AccessSize) {
142 HexagonMCEmitCommonSymbol(Symbol, Size, ByteAlignment, AccessSize);
|
| HexagonMCELFStreamer.h | 35 unsigned AccessSize);
37 unsigned ByteAlignment, unsigned AccessSize);
|
| HexagonMCTargetDesc.cpp | 133 unsigned AccessSize) override {
137 AccessSize);
141 unsigned AccessSize) override {
145 Symbol, Size, ByteAlignment, AccessSize);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonIsetDx.td | 42 let Defs = [R31, R29, R30], Uses = [R30], isCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWordAccess in
53 let Defs = [PC, R31, R29, R30], Uses = [R30, P0], isCodeGenOnly = 1, isPredicated = 1, isPredicatedFalse = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBranch = 1 in
79 let isCodeGenOnly = 1, mayStore = 1, accessSize = ByteAccess in
106 let isCodeGenOnly = 1, mayLoad = 1, accessSize = HalfWordAccess, hasNewValue = 1, opNewValue = 0 in
148 let isCodeGenOnly = 1, mayLoad = 1, accessSize = ByteAccess, hasNewValue = 1, opNewValue = 0 in
164 let isCodeGenOnly = 1, mayLoad = 1, accessSize = WordAccess, hasNewValue = 1, opNewValue = 0 in
211 let Defs = [PC, R31, R29, R30], Uses = [R30, P0], isCodeGenOnly = 1, isPredicated = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBranch = 1 in
221 let Defs = [R29, R30], Uses = [R30, R31, R29], isCodeGenOnly = 1, mayStore = 1, accessSize = DoubleWordAccess in
233 let isCodeGenOnly = 1, mayStore = 1, accessSize = HalfWordAccess in
249 let isCodeGenOnly = 1, mayStore = 1, accessSize = WordAccess i
[all...] |
| HexagonInstrInfoV60.td | 43 let addrMode = BaseImmOffset, accessSize = Vector64Access in
48 let isCodeGenOnly = 1, addrMode = BaseImmOffset, accessSize = Vector128Access in
105 let addrMode = BaseImmOffset, accessSize = Vector64Access in
113 let accessSize = Vector64Access in
117 let isCodeGenOnly = 1, accessSize = Vector128Access in
152 let accessSize = Vector64Access in
156 let isCodeGenOnly = 1, accessSize = Vector128Access in
185 let accessSize = Vector64Access in
190 let isCodeGenOnly = 1, accessSize = Vector128Access in
246 let accessSize = Vector64Access i
[all...] |
| HexagonInstrInfoV4.td | 416 let accessSize = ByteAccess, hasNewValue = 1 in {
421 let accessSize = HalfWordAccess, hasNewValue = 1 in {
428 let accessSize = WordAccess, hasNewValue = 1 in
431 let accessSize = WordAccess in {
436 let accessSize = DoubleWordAccess in
439 let accessSize = ByteAccess in
442 let accessSize = HalfWordAccess in
472 let accessSize = ByteAccess in {
479 let accessSize = HalfWordAccess in {
488 let accessSize = WordAccess in
[all...] |
| HexagonInstrInfo.td | [all...] |
| HexagonInstrFormats.td | 165 MemAccessSize accessSize = NoMemAccess;
166 let TSFlags{46-43} = accessSize.Value;
|
| HexagonInstrInfo.h | 346 unsigned &AccessSize) const;
|
| HexagonInstrInfo.cpp | [all...] |
| /external/compiler-rt/test/tsan/ |
| unaligned_norace.cc | 36 static int accesssize(int sz) { function
57 p += accesssize(sz1);
|
| unaligned_race.cc | 39 static int accesssize(int sz) { function
109 for (int off2 = 0; off2 < accesssize(sz1); off2++) {
|
| /external/llvm/test/CodeGen/Hexagon/ |
| base-offset-post.ll | 4 ; Test that the accessSize is set on a post-increment store. If not, an assert
|
| /external/llvm/lib/Analysis/ |
| Loads.cpp | 208 uint64_t AccessSize = DL.getTypeStoreSize(AccessTy);
262 if (AA && (AA->getModRefInfo(SI, StrippedPtr, AccessSize) & MRI_Mod) == 0)
275 (AA->getModRefInfo(Inst, StrippedPtr, AccessSize) & MRI_Mod) == 0)
|
| /external/llvm/lib/Transforms/Instrumentation/ |
| SafeStack.cpp | 210 bool SafeStack::IsAccessSafe(Value *Addr, uint64_t AccessSize,
218 ConstantRange(APInt(BitWidth, 0), APInt(BitWidth, AccessSize));
|
| MemorySanitizer.cpp | 348 // These arrays are indexed by log2(AccessSize).
417 unsigned AccessSize = 1 << AccessSizeIndex;
418 std::string FunctionName = "__msan_maybe_warning_" + itostr(AccessSize);
420 FunctionName, IRB.getVoidTy(), IRB.getIntNTy(AccessSize * 8),
423 FunctionName = "__msan_maybe_store_origin_" + itostr(AccessSize);
425 FunctionName, IRB.getVoidTy(), IRB.getIntNTy(AccessSize * 8),
[all...] |
| AddressSanitizer.cpp | 493 // This array is indexed by AccessIsWrite, Experiment and log2(AccessSize).
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| LoopIdiomRecognize.cpp | 458 uint64_t AccessSize = MemoryLocation::UnknownSize;
463 AccessSize = (BECst->getValue()->getZExtValue() + 1) * StoreSize;
469 MemoryLocation StoreLoc(Ptr, AccessSize);
[all...] |
