| /external/llvm/test/CodeGen/Hexagon/ |
| extload-combine.ll | 23 %conv2 = zext i16 %0 to i64
24 ret i64 %conv2
34 %conv2 = sext i16 %0 to i64
35 ret i64 %conv2
45 %conv2 = zext i8 %0 to i64
46 ret i64 %conv2
56 %conv2 = sext i8 %0 to i64
57 ret i64 %conv2
|
| memops2.ll | 10 %conv2 = zext i16 %0 to i32
11 %sub = add nsw i32 %conv2, 65535
25 %conv2 = trunc i32 %sub to i16
26 store i16 %conv2, i16* %add.ptr1, align 2
|
| cext.ll | 13 %conv2 = trunc i32 %mul to i8
14 ret i8 %conv2
|
| cexti16.ll | 13 %conv2 = trunc i32 %mul to i16
14 ret i16 %conv2
|
| fusedandshift.ll | 13 %conv2 = trunc i32 %and1 to i16
14 store i16 %conv2, i16* %b, align 2
|
| memops.ll | 22 %conv2 = trunc i32 %add to i8
23 store i8 %conv2, i8* %p, align 1
34 %conv2 = trunc i32 %sub to i8
35 store i8 %conv2, i8* %p, align 1
99 %conv2 = trunc i32 %add to i8
100 store i8 %conv2, i8* %add.ptr, align 1
112 %conv2 = trunc i32 %sub to i8
113 store i8 %conv2, i8* %add.ptr, align 1
181 %conv2 = trunc i32 %add to i8
182 store i8 %conv2, i8* %add.ptr, align
[all...] |
| memops3.ll | 25 %conv2 = trunc i32 %sub to i8
26 store i8 %conv2, i8* %add.ptr1, align 1
|
| tfr-to-combine.ll | 24 %conv2 = zext i16 %0 to i64
25 ret i64 %conv2
|
| /external/llvm/test/Transforms/InstCombine/ |
| udivrem-change-width.ll | 8 %conv2 = zext i8 %b to i32
9 %div = udiv i32 %conv, %conv2
18 %conv2 = zext i8 %b to i32
19 %div = urem i32 %conv, %conv2
28 %conv2 = zext i8 %b to i32
29 %div = udiv i32 %conv, %conv2
38 %conv2 = zext i8 %b to i32
39 %div = urem i32 %conv, %conv2
|
| pr8547.ll | 17 %conv2 = lshr i32 %shl, 24
19 ; CHECK: %conv2 = and i32 %0, 64
20 %tobool = icmp eq i32 %conv2, 0
24 %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %conv2) nounwind
|
| cos-1.ll | 25 %conv2 = fptrunc double %cos to float
27 ret float %conv2
36 %conv2 = fptrunc double %cos to float
37 ret float %conv2
|
| /external/llvm/test/CodeGen/ARM/ |
| fast-isel-icmp.ll | 16 %conv2 = zext i1 %cmp to i32
17 ret i32 %conv2
31 %conv2 = zext i1 %cmp to i32
32 ret i32 %conv2
46 %conv2 = zext i1 %cmp to i32
47 ret i32 %conv2
61 %conv2 = zext i1 %cmp to i32
62 ret i32 %conv2
76 %conv2 = zext i1 %cmp to i32
77 ret i32 %conv2
[all...] |
| smml.ll | 8 %conv2 = sext i32 %c to i64
9 %mul = mul nsw i64 %conv2, %conv1
|
| noreturn.ll | 24 %conv2 = trunc i64 %mul to i32
25 %conv3 = sext i32 %conv2 to i64
34 ret i32 %conv2
|
| /external/llvm/test/CodeGen/AArch64/ |
| regress-fp128-livein.ll | 8 %conv2 = sitofp i32 %conv to fp128
10 %call3 = tail call i32 @g(fp128 %conv2)
|
| Redundantstore.ll | 14 %conv2 = trunc i64 %and to i32
18 store i32 %conv2, i32* %size4, align 4
22 store i32 %conv2, i32* %size6, align 4
|
| arm64-fast-isel-icmp.ll | 180 %conv2 = zext i1 %cmp to i32
181 ret i32 %conv2
191 %conv2 = zext i1 %cmp to i32
192 ret i32 %conv2
203 %conv2 = zext i1 %cmp to i32
204 ret i32 %conv2
215 %conv2 = zext i1 %cmp to i32
216 ret i32 %conv2
227 %conv2 = zext i1 %cmp to i32
228 ret i32 %conv2
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| 2009-06-05-VariableIndexInsert.ll | 7 %conv2 = trunc i32 %b to i16 ; <i16> [#uses=1]
9 %vecins = insertelement <8 x i16> %conv, i16 %conv2, i32 %and ; <<8 x i16>> [#uses=1]
|
| /external/llvm/test/Transforms/InstSimplify/ |
| shift-128-kb.ll | 11 %conv2 = zext i64 %Val to i128
13 %shl = shl i128 %conv2, %sh_prom
|
| /external/llvm/test/Transforms/Reassociate/ |
| pr21205.ll | 18 %conv2 = fptosi float %sub1 to i32
19 store i32 %conv2, i32* @b, align 4
|
| /external/llvm/test/CodeGen/Thumb2/ |
| longMACt.ll | 30 %conv2 = zext i32 %c to i64
31 %add = add i64 %mul, %conv2
41 %conv2 = sext i32 %c to i64
42 %add = add nsw i64 %mul, %conv2
|
| /external/llvm/test/Transforms/LoadCombine/ |
| load-combine-aa.ll | 16 %conv2 = zext i32 %load2 to i64
17 %shl = shl nuw i64 %conv2, 32
34 %conv2 = zext i32 %load2 to i64
35 %shl = shl nuw i64 %conv2, 32
|
| load-combine-assume.ll | 20 %conv2 = zext i32 %load2 to i64
21 %shl = shl nuw i64 %conv2, 32
39 %conv2 = zext i32 %load2 to i64
40 %shl = shl nuw i64 %conv2, 32
|
| /external/llvm/test/Instrumentation/AddressSanitizer/ |
| asan-vs-gvn.ll | 21 %conv2 = zext i8 %tmp1 to i32
22 %add = add nsw i32 %conv, %conv2
44 %conv2 = zext i8 %tmp1 to i32
45 %add = add nsw i32 %conv, %conv2
|
| /external/llvm/test/CodeGen/Mips/ |
| seteqz.ll | 18 %conv2 = zext i1 %cmp1 to i32
19 store i32 %conv2, i32* @r2, align 4
|
