| /external/llvm/test/CodeGen/X86/ |
| fast-isel-sse12-fptoint.ll | 6 ; SSE: cvttss2si %xmm0, %eax
13 %5 = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %4)
16 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
20 ; SSE: cvttss2si %xmm0, %rax
|
| scalar-fp-to-i64.ll | 40 ; SSE2_64: cvttss2si
44 ; SSE3_64: cvttss2si
59 ; SSE2_64: cvttss2si
61 ; SSE3_64: cvttss2si
|
| vec_fp_to_int.ll | 492 ; SSE-NEXT: cvttss2si %xmm0, %rax
495 ; SSE-NEXT: cvttss2si %xmm0, %rax
518 ; SSE-NEXT: cvttss2si %xmm0, %rax
521 ; SSE-NEXT: cvttss2si %xmm0, %rax
559 ; SSE-NEXT: cvttss2si %xmm0, %rax
563 ; SSE-NEXT: cvttss2si %xmm1, %rax
568 ; SSE-NEXT: cvttss2si %xmm1, %rax
571 ; SSE-NEXT: cvttss2si %xmm0, %rax
602 ; SSE-NEXT: cvttss2si %xmm0, %rax
606 ; SSE-NEXT: cvttss2si %xmm1, %ra
[all...] |
| vec_ss_load_fold.ll | 15 %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
30 %tmp = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
47 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
|
| half.ll | 81 ; CHECK-LIBCALL-NEXT: cvttss2si %xmm0, %rax
126 ; CHECK-LIBCALL-NEXT: cvttss2si [[REG2]], [[REG3:%[a-z0-9]+]]
129 ; CHECK-LIBCALL-NEXT: cvttss2si %xmm0, [[REG5:%[a-z0-9]+]]
|
| sse-intrinsics-x86.ll | 105 ; CHECK: cvttss2si
106 %res = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0) ; <i32> [#uses=1]
109 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-opcode.d | 123 [ ]*[a-f0-9]+: f3 49 0f 2c 00 cvttss2si \(%r8\),%rax
124 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si \(%rax\),%rax
125 [ ]*[a-f0-9]+: f3 4d 0f 2c 00 cvttss2si \(%r8\),%r8
126 [ ]*[a-f0-9]+: f3 4c 0f 2c 00 cvttss2si \(%rax\),%r8
127 [ ]*[a-f0-9]+: f3 48 0f 2c c0 cvttss2si %xmm0,%rax
128 [ ]*[a-f0-9]+: f3 4d 0f 2c c7 cvttss2si %xmm15,%r8
129 [ ]*[a-f0-9]+: f3 49 0f 2c c7 cvttss2si %xmm15,%rax
130 [ ]*[a-f0-9]+: f3 4d 0f 2c c0 cvttss2si %xmm8,%r8
131 [ ]*[a-f0-9]+: f3 49 0f 2c c0 cvttss2si %xmm8,%rax
132 [ ]*[a-f0-9]+: f3 4c 0f 2c c7 cvttss2si %xmm7,%r
[all...] |
| x86-64-simd-intel.d | 71 [ ]*[a-f0-9]+: f3 0f 2c 00 cvttss2si eax,DWORD PTR \[rax\]
72 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si rax,DWORD PTR \[rax\]
190 [ ]*[a-f0-9]+: f3 0f 2c 00 cvttss2si eax,DWORD PTR \[rax\]
191 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si rax,DWORD PTR \[rax\]
|
| x86-64-simd.d | 71 [ ]*[a-f0-9]+: f3 0f 2c 00 cvttss2si \(%rax\),%eax
72 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si \(%rax\),%rax
190 [ ]*[a-f0-9]+: f3 0f 2c 00 cvttss2si \(%rax\),%eax
191 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si \(%rax\),%rax
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| x86-64-opcode.d | 122 [ ]*[a-f0-9]+: f3 49 0f 2c 00 cvttss2si \(%r8\),%rax
123 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si \(%rax\),%rax
124 [ ]*[a-f0-9]+: f3 4d 0f 2c 00 cvttss2si \(%r8\),%r8
125 [ ]*[a-f0-9]+: f3 4c 0f 2c 00 cvttss2si \(%rax\),%r8
126 [ ]*[a-f0-9]+: f3 48 0f 2c c0 cvttss2si %xmm0,%rax
127 [ ]*[a-f0-9]+: f3 4d 0f 2c c7 cvttss2si %xmm15,%r8
128 [ ]*[a-f0-9]+: f3 49 0f 2c c7 cvttss2si %xmm15,%rax
129 [ ]*[a-f0-9]+: f3 4d 0f 2c c0 cvttss2si %xmm8,%r8
130 [ ]*[a-f0-9]+: f3 49 0f 2c c0 cvttss2si %xmm8,%rax
131 [ ]*[a-f0-9]+: f3 4c 0f 2c c7 cvttss2si %xmm7,%r
[all...] |
| katmai.s | 65 cvttss2si 0x0(%ebp),%esp
66 cvttss2si %xmm6,%ebp
|
| x86-64-simd.s | 64 cvttss2si (%rax),%eax
192 cvttss2si eax,DWORD PTR [rax] label
193 cvttss2si rax,DWORD PTR [rax] label
|
| simd.s | 45 cvttss2si (%eax),%eax
145 cvttss2si eax,DWORD PTR [eax] label
|
| x86-64-sse2avx.s | 602 cvttss2si %xmm4,%ecx
603 cvttss2si (%rcx),%ecx
608 cvttss2si %xmm4,%rcx
609 cvttss2si (%rcx),%rcx
1306 cvttss2si ecx,xmm4
1307 cvttss2si ecx,DWORD PTR [rcx]
1312 cvttss2si rcx,xmm4
1313 cvttss2si rcx,DWORD PTR [rcx]
|
| katmai.d | 69 fd: f3 0f 2c 65 00 [ ]*cvttss2si 0x0\(%ebp\),%esp
70 102: f3 0f 2c ee [ ]*cvttss2si %xmm6,%ebp
|
| x86-64-simd-intel.d | 71 [ ]*[a-f0-9]+: f3 0f 2c 00 cvttss2si eax,DWORD PTR \[rax\]
72 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si rax,DWORD PTR \[rax\]
190 [ ]*[a-f0-9]+: f3 0f 2c 00 cvttss2si eax,DWORD PTR \[rax\]
191 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si rax,DWORD PTR \[rax\]
|
| x86-64-simd.d | 70 [ ]*[a-f0-9]+: f3 0f 2c 00 cvttss2si \(%rax\),%eax
71 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si \(%rax\),%rax
189 [ ]*[a-f0-9]+: f3 0f 2c 00 cvttss2si \(%rax\),%eax
190 [ ]*[a-f0-9]+: f3 48 0f 2c 00 cvttss2si \(%rax\),%rax
|
| sse2avx.s | 578 cvttss2si %xmm4,%ecx
579 cvttss2si (%ecx),%ecx
1239 cvttss2si ecx,xmm4
1240 cvttss2si ecx,DWORD PTR [ecx]
|
| /external/llvm/test/Transforms/ConstProp/ |
| calls.ll | 185 %i1 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind
204 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
|
| /external/valgrind/memcheck/tests/amd64/ |
| sse_memory.c | 206 //TEST_INSN( &AllMask, 0,cvttss2si)
437 //TEST_INSN( &AllMask, 0,cvttss2si)
|
| /external/llvm/test/Transforms/InstCombine/ |
| vec_demanded_elts.ll | 20 %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
59 %tmp2 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %v23)
134 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
|
| /prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
| plan9x.go | 152 CVTTSS2SI: true,
|
| /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
| plan9x.go | 152 CVTTSS2SI: true,
|
| /external/v8/test/cctest/ |
| test-disasm-x64.cc | 384 __ cvttss2si(rdx, Operand(rbx, rcx, times_4, 10000));
385 __ cvttss2si(rdx, xmm1);
|
| /external/valgrind/none/tests/amd64/ |
| insn_sse.def | 57 cvttss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
58 cvttss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[56]
|
