| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/ |
| fmul.sm | 0 fmul #{imm32},{reg}
2 fmul {reg},{reg}
3 fmul {mem}.L,{reg}
|
| fmul.d | 9 0: fd 72 30 00 00 00 80 fmul #0x80000000, r0
10 7: fd 72 3f 00 00 00 80 fmul #0x80000000, r15
11 e: fd 72 30 ff ff ff ff fmul #-1, r0
12 15: fd 72 3f ff ff ff ff fmul #-1, r15
13 1c: fc 8f 00 fmul r0, r0
14 1f: fc 8f 0f fmul r0, r15
15 22: fc 8f f0 fmul r15, r0
16 25: fc 8f ff fmul r15, r15
17 28: fc 8c 00 fmul \[r0\]\.l, r0
18 2b: fc 8c 0f fmul \[r0\]\.l, r1
[all...] |
| /external/llvm/test/Transforms/Reassociate/ |
| fast-mightymul.ll | 5 %t0 = fmul fast float %x, %x
6 %t1 = fmul fast float %t0, %t0
7 %t2 = fmul fast float %t1, %t1
8 %t3 = fmul fast float %t2, %t2
9 %t4 = fmul fast float %t3, %t3
10 %t5 = fmul fast float %t4, %t4
11 %t6 = fmul fast float %t5, %t5
12 %t7 = fmul fast float %t6, %t6
13 %t8 = fmul fast float %t7, %t7
14 %t9 = fmul fast float %t8, %t
[all...] |
| mixed-fast-nonfast-fp.ll | 4 ; CHECK: %mul3 = fmul float %a, %b
5 ; CHECK-NEXT: fmul fast float %c, 2.000000e+00
7 ; CHECK-NEXT: fmul fast float %tmp1, %a
10 %mul1 = fmul fast float %a, %c
11 %mul2 = fmul fast float %a, %b
12 %mul3 = fmul float %a, %b
13 %mul4 = fmul fast float %a, %c
|
| fast-fp-commute.ll | 7 ; CHECK: fmul fast float %y, %x
8 ; CHECK: fmul fast float %y, %x
13 %1 = fmul fast float %x, %y
14 %2 = fmul fast float %y, %x
23 ; CHECK-NEXT: fmul fast float %y, %x
24 ; CHECK-NEXT: fmul fast float %y, %x
28 %1 = fmul fast float %x, %y
29 %2 = fmul fast float %y, %x
36 ; CHECK-NEXT: %factor = fmul fast float %x, 2.000000e+00
37 ; CHECK-NEXT: %tmp1 = fmul fast float %factor, %
[all...] |
| reassoc-intermediate-fnegs.ll | 3 ; CHECK: [[TMP1:%tmp.*]] = fmul fast half %a, 0xH4500
4 ; CHECK: [[TMP2:%tmp.*]] = fmul fast half %b, 0xH4500
9 %tmp1 = fmul fast half %b, 0xH4200 ; 3*b
10 %tmp2 = fmul fast half %a, 0xH4500 ; 5*a
11 %tmp3 = fmul fast half %b, 0xH4000 ; 2*b
18 ; CHECK: [[TMP1:%tmp.*]] = fmul fast half %a, 0xH4500
19 ; CHECK: [[TMP2:%tmp.*]] = fmul fast half %b, 0xH3C00
24 %tmp1 = fmul fast half %b, 0xH4200 ; 3*b
25 %tmp2 = fmul fast half %a, 0xH4500 ; 5*a
26 %tmp3 = fmul fast half %b, 0xH4000 ; 2*
[all...] |
| fast-multistep.ll | 7 ; CHECK-NEXT: [[TMP2:%tmp.*]] = fmul fast float %a, %a
8 ; CHECK-NEXT: fmul fast float [[TMP2]], [[TMP1]]
11 %t0 = fmul fast float %a, %b
12 %t1 = fmul fast float %a, %t0 ; a*(a*b)
13 %t2 = fmul fast float %a, %c
14 %t3 = fmul fast float %a, %t2 ; a*(a*c)
23 ; CHECK-NEXT: fmul fast float %tmp, %a
27 %t0 = fmul fast float %a, %b
28 %t1 = fmul fast float %a, %c
|
| fp-commute.ll | 7 ; CHECK: fmul float %x, %y
8 ; CHECK: fmul float %x, %y
13 %1 = fmul float %x, %y
14 %2 = fmul float %y, %x
|
| /art/runtime/interpreter/mterp/arm64/ |
| op_mul_float.S | 1 %include "arm64/fbinop.S" {"instr":"fmul s0, s0, s1"}
|
| op_mul_float_2addr.S | 1 %include "arm64/fbinop2addr.S" {"instr":"fmul s2, s0, s1"}
|
| op_mul_double_2addr.S | 1 %include "arm64/binopWide2addr.S" {"instr":"fmul d0, d0, d1", "r0":"d0", "r1":"d1"}
|
| op_mul_double.S | 1 %include "arm64/binopWide.S" {"instr":"fmul d0, d1, d2", "result":"d0", "r1":"d1", "r2":"d2"}
|
| /external/llvm/test/CodeGen/X86/ |
| 2008-07-19-movups-spills.ll | 110 fmul <4 x float> %1, %1 ; <<4 x float>>:33 [#uses=1]
111 fmul <4 x float> %33, %2 ; <<4 x float>>:34 [#uses=1]
112 fmul <4 x float> %34, %3 ; <<4 x float>>:35 [#uses=1]
113 fmul <4 x float> %35, %4 ; <<4 x float>>:36 [#uses=1]
114 fmul <4 x float> %36, %5 ; <<4 x float>>:37 [#uses=1]
115 fmul <4 x float> %37, %6 ; <<4 x float>>:38 [#uses=1]
116 fmul <4 x float> %38, %7 ; <<4 x float>>:39 [#uses=1]
117 fmul <4 x float> %39, %8 ; <<4 x float>>:40 [#uses=1]
118 fmul <4 x float> %40, %9 ; <<4 x float>>:41 [#uses=1]
119 fmul <4 x float> %41, %10 ; <<4 x float>>:42 [#uses=1
[all...] |
| 2007-01-08-InstrSched.ll | 5 %tmp1 = fmul float %x, 3.000000e+00
6 %tmp3 = fmul float %x, 5.000000e+00
7 %tmp5 = fmul float %x, 7.000000e+00
8 %tmp7 = fmul float %x, 1.100000e+01
|
| fmul-combines.ll | 6 %y = fmul float %x, 2.0
10 ; fmul 2.0, x -> fadd x, x for vectors.
16 %y = fmul <4 x float> %x, <float 2.0, float 2.0, float 2.0, float 2.0>
24 %y = fmul <4 x float> <float 4.0, float 4.0, float 4.0, float 4.0>, <float 2.0, float 2.0, float 2.0, float 2.0>
32 %y = fmul <4 x float> %x, <float 0.0, float 0.0, float 0.0, float 0.0>
42 %y = fmul <4 x float> %x, <float 2.0, float 2.0, float 2.0, float 2.0>
43 %z = fmul <4 x float> %y, <float 4.0, float 4.0, float 4.0, float 4.0>
53 %y = fmul <4 x float> %x, <float 3.0, float 3.0, float 3.0, float 3.0>
54 %z = fmul <4 x float> %y, <float 4.0, float 4.0, float 4.0, float 4.0>
68 %y = fmul <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| unsafe-math.ll | 1 ; RUN: llc < %s -mattr=-vsx -march=ppc32 | grep fmul | count 2
3 ; RUN: grep fmul | count 1
6 %tmp1 = fmul double %X, 1.23
7 %tmp2 = fmul double %tmp1, 4.124
|
| pr18663.ll | 79 %mul334 = fmul double undef, 2.000000e+00
80 %mul579 = fmul double %2, %5
81 %mul597 = fmul double undef, %mul579
82 %mul679 = fmul double %2, %8
83 %mul1307 = fmul double undef, %1
84 %mul2092 = fmul double undef, %4
85 %mul2679 = fmul double undef, undef
86 %mul2931 = fmul double undef, %3
87 %mul3094 = fmul double undef, %3
88 %mul3096 = fmul double %mul3094, %
[all...] |
| /external/llvm/test/Transforms/BBVectorize/ |
| cycle.ll | 8 ; %mul95 = fmul double %sub45.v.r1, %sub36.v.r1 <-> %mul88 = fmul double %sub36.v.r1, %sub87 (mul88 depends on add84)
9 ; %mul117 = fmul double %sub39.v.r1, %sub116 <-> %mul97 = fmul double %mul96, %sub39.v.r1 (mul97 depends on mul95)
36 %mul63 = fmul double %conv62, 3.000000e+00
37 %mul67 = fmul double %sub65, %conv
42 %mul75 = fmul double %conv57, 2.000000e+00
43 %mul76 = fmul double %mul75, %sub42
45 %mul82 = fmul double %add80, %conv
50 %mul88 = fmul double %sub36, %sub8
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| fdiv-combine.ll | 11 ; CHECK: fmul
12 ; CHECK: fmul
13 ; CHECK: fmul
25 ; CHECK: fmul
26 ; CHECK: fmul
27 ; CHECK: fmul
39 ; CHECK: fmul
40 ; CHECK: fmul
41 ; CHECK: fmul
53 ; CHECK: fmul
[all...] |
| fcvt_combine.ll | 4 ; CHECK-NOT: fmul.2s
8 %mul.i = fmul <2 x float> %f, <float 16.000000e+00, float 16.000000e+00>
14 ; CHECK-NOT: fmul.4s
18 %mul.i = fmul <4 x float> %f, <float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00>
24 ; CHECK-NOT: fmul.2d
28 %mul.i = fmul <2 x double> %d, <double 32.000000e+00, double 32.000000e+00>
35 ; CHECK-NOT: fmul.2d v0, v0, #4
40 %mul.i = fmul <2 x double> %d, <double 16.000000e+00, double 16.000000e+00>
47 ; CHECK-NOT: fmul.2s
51 %mul.i = fmul <2 x float> %f, <float 16.000000e+00, float 16.000000e+00
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| pow-4.ll | 13 ; CHECK-NEXT: %1 = fmul float %x, %x
14 ; CHECK-NEXT: %2 = fmul float %1, %1
24 ; CHECK-NEXT: %1 = fmul double %x, %x
25 ; CHECK-NEXT: %2 = fmul double %1, %x
35 ; CHECK-NEXT: %1 = fmul double %x, %x
36 ; CHECK-NEXT: %2 = fmul double %1, %1
46 ; CHECK-NEXT: %1 = fmul double %x, %x
47 ; CHECK-NEXT: %2 = fmul double %1, %x
48 ; CHECK-NEXT: %3 = fmul double %2, %2
49 ; CHECK-NEXT: %4 = fmul double %3, %
[all...] |
| fmul.ll | 6 %mul = fmul float %sub, 2.0e+1
10 ; CHECK: fmul float %x, -2.000000e+01
16 %mul = fmul float %sub, 2.0e+1
20 ; CHECK: fmul float %x, -2.000000e+01
27 %mul = fmul fast float %sub1, %sub2
30 ; CHECK: fmul fast float %x, %y
37 %mul = fmul float %sub1, %sub2
40 ; CHECK: fmul float %x, %y
46 %mul = fmul float %sub1, %y
49 ; CHECK: %1 = fmul float %x, %
[all...] |
| /external/llvm/test/Transforms/BBVectorize/X86/ |
| pr15289.ll | 32 %0 = fmul double undef, undef
33 %1 = fmul double undef, undef
35 %3 = fmul double undef, 0x3FE8B8B76E3E9919
38 %6 = fmul double undef, undef
39 %7 = fmul double %4, %6
40 %8 = fmul double undef, 2.000000e+00
41 %9 = fmul double %8, undef
42 %10 = fmul double undef, %9
43 %11 = fmul double %10, undef
45 %13 = fmul double %3, %1
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2009-11-13-ScavengerAssert.ll | 19 %3 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
21 %5 = fmul float %4, %2 ; <float> [#uses=1]
23 %7 = fmul float %4, undef ; <float> [#uses=1]
25 %9 = fmul float undef, %2 ; <float> [#uses=1]
26 %10 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
28 %12 = fmul float undef, %6 ; <float> [#uses=1]
29 %13 = fmul float 0.000000e+00, %8 ; <float> [#uses=1]
31 %15 = fmul float %1, %11 ; <float> [#uses=1]
36 %19 = fmul float %4, undef ; <float> [#uses=1]
|
| 2009-11-07-SubRegAsmPrinting.ll | 10 %1 = fmul float %0, undef ; <float> [#uses=2]
11 %2 = fmul float 0.000000e+00, %1 ; <float> [#uses=2]
12 %3 = fmul float %0, %1 ; <float> [#uses=1]
22 %11 = fmul float %8, %10 ; <float> [#uses=1]
24 %13 = fmul float undef, undef ; <float> [#uses=1]
25 %14 = fmul float %6, 0.000000e+00 ; <float> [#uses=1]
27 %16 = fmul float %9, %10 ; <float> [#uses=1]
29 %18 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
31 %20 = fmul float undef, %10 ; <float> [#uses=1]
34 %23 = fmul float %5, %22 ; <float> [#uses=1
[all...] |
