| /external/llvm/test/CodeGen/Mips/ |
| 2013-11-18-fp64-const0.ll | 1 ; RUN: llc -march=mips -mattr=-fp64 < %s | FileCheck -check-prefix=CHECK-FP32 %s
2 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck -check-prefix=CHECK-FP64 %s
6 ; It originally failed on MIPS32 with FP64 with the following error:
16 ; CHECK-FP64: mtc1 $zero, $f{{[0-9]+}}
17 ; CHECK-FP64-NOT: mtc1 $zero,
|
| stack-alignment.ll | 2 ; RUN: llc -march=mipsel -mattr=+fp64 < %s | FileCheck %s -check-prefix=32
|
| fastcc.ll | 5 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+fp64,+nooddspreg | FileCheck %s -check-prefix=FP64-NOODDSPREG
356 ; FP64-NOODDSPREG-LABEL: caller3:
361 ; FP64-NOODDSPREG-DAG: lw $[[R0:[0-9]+]], %got(da)(${{[0-9]+|gp}})
362 ; FP64-NOODDSPREG-DAG: ldc1 $f0, 0($[[R0]])
363 ; FP64-NOODDSPREG-DAG: ldc1 $f2, 8($[[R0]])
364 ; FP64-NOODDSPREG-DAG: ldc1 $f4, 16($[[R0]])
365 ; FP64-NOODDSPREG-DAG: ldc1 $f6, 24($[[R0]])
366 ; FP64-NOODDSPREG-DAG: ldc1 $f8, 32($[[R0]])
367 ; FP64-NOODDSPREG-DAG: ldc1 $f10, 40($[[R0]]
[all...] |
| buildpairextractelementf64.ll | 5 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefix=HAS-MFHC1 -check-prefix=ALL
6 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefix=HAS-MFHC1 -check-prefix=ALL
|
| fp64a.ll | 9 ; FIXME: We currently don't test that attempting to use FP64 on MIPS32r1 is an
14 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32R2-NO-FP64A-BE
15 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=32R2-FP64A
16 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=32R2-NO-FP64A-LE
17 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=32R2-FP64A
19 ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64-NO-FP64A
20 ; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A
21 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=64-NO-FP64A
22 ; RUN: not llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A
|
| cfi_offset.ll | 5 ; RUN: llc -march=mips -mattr=+o32,+fp64 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-EB
6 ; RUN: llc -march=mipsel -mattr=+o32,+fp64 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-EL
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| default-fp-mode.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=FP32-DENORMAL -check-prefix=FUNC %s
3 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=BOTH-DENORMAL -check-prefix=FUNC %s
4 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=NO-DENORMAL -check-prefix=FUNC %s
7 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp64-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
8 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=FUNC %s
9 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=FP32-DENORMAL -check-prefix=FUNC %s
10 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=BOTH-DENORMAL -check-prefix=FUNC %
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrFP.td | 16 def SelectF64 : SelectWrapper<FP64>;
21 defm CondStoreF64 : CondStores<FP64, nonvolatile_store,
31 def LZDR : InherentRRE<"lzdr", 0xB375, FP64, (fpimm0)>;
38 def LDR : UnaryRR <"ld", 0x28, null_frag, FP64, FP64>;
46 defm LTDBR : LoadAndTestRRE<"ltdb", 0xB312, FP64>;
54 defm : CompareZeroFP<LTDBRCompare, FP64>;
62 def LTDBRCompare_VecPseudo : Pseudo<(outs), (ins FP64:$R1, FP64:$R2), []>;
67 defm : CompareZeroFP<LTDBRCompare_VecPseudo, FP64>;
[all...] |
| /external/llvm/test/CodeGen/Mips/cconv/ |
| callee-saved-fpxx1.ll | 1 ; RUN: llc -march=mips -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
2 ; RUN: llc -march=mipsel -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
20 ; O32-FP64-INV-NOT: sdc1 $f20,
|
| return-hard-float.ll | 13 ; RUN: llc -mtriple=mips-linux-gnu -relocation-model=static -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=ALL --check-prefix=032FP64 %s
14 ; RUN: llc -mtriple=mipsel-linux-gnu -relocation-model=static -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=ALL --check-prefix=032FP64 %s
58 ; 032FP64-DAG: ldc1 $f0, 0($sp)
59 ; 032FP64-DAG: ldc1 $f2, 8($sp)
|
| /external/v8/src/arm64/ |
| constants-arm64.h | 413 FP64 = 0x00400000
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| attr-none-o32-fp64-nooddspreg.d | 5 #name: MIPS infer fpabi (O32 fp64 nooddspreg)
|
| attr-none-o32-fp64.d | 5 #name: MIPS infer fpabi (O32 fp64)
|
| /external/clang/test/CodeGenCXX/ |
| mangle-literal-suffix.cpp | 1 // RUN: %clang_cc1 -triple mips-none-none -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=FP64
10 // FP64: _Z2g4IiEvRAszplcvT__ELe4014000000000000E_c
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| elm_move.ll | 4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
|
| llvm-stress-s2501752154-simplified.ll | 2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
|
| llvm-stress-sz1-s742806235.ll | 2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
|
| llvm-stress-s449609655-simplified.ll | 2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
|
| 2rf_tq.ll | 4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
|
| 3rf_float_int.ll | 4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
|
| /external/vixl/src/vixl/a64/ |
| constants-a64.h | 399 FP64 = 0x00400000
419 NEON_FP_2D = FP64 | NEON_Q
[all...] |
| /external/llvm/test/MC/Mips/ |
| nooddspreg-error.s | 1 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 2> %t0 | \
|
| update-module-level-options.s | 1 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,-nooddspreg 2>&1 | \
|
| mips-reginfo-fp64.s | 1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa,+fp64 -filetype=obj -o - | \
5 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n32 -filetype=obj -o - | \
9 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n64 -filetype=obj -o - | \
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
| attr-gnu-4-4-ph.d | 11 private flags = 70001200: \[abi=O32\] \[mips32r2\] \[old fp64\] \[not 32bitmode\]
|
